Setting Up The Serial Interface Clock; Block Diagram Of Serial Interface Clock; Panasonic - Panasonic MN10285K User Manual

Panax series microcomputer
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Serial Interfaces
Serial Interface Setup Examples
MN102H75K/F75K/85K/F85K LSI User Manual
5.6.3

Setting Up the Serial Interface Clock

This example demonstrates how to set up a 19,200 bps transfer clock for the
UART interface by using timer 1 to divide B
following settings:
B
= 24 MHz
OSC
Clock source = timer 1 underflow x 1/8
Transfer clock = baud rate x 8
The serial interface determines the baud rate from the 8-bit underflow. Set up the
transfer clock by making the timer 1 underflow either two or eight times the
desired baud rate. The serial interface divides the timer underflow by two or
eight. (Always select divide-by-eight for UART transactions.) For a baud rate of
19,200, since B
/4 = 6 MHz,
OSC
6 MHz/39/8 = 19230.77 bps
This means that the timer 1 underflow must be divided by 39.
P0
P2
P4
P6
Figure 5-11 Block Diagram of Serial Interface Clock
To set timer 1:
1.
Disable timer 1 counting in the timer 1 mode register (TM1MD). This step is
unnecessary immediately after a reset, since TM1MD resets to 0.
TM1MD (example)
Bit:
7
6
5
4
TM1
TM1
EN
LD
Setting:
0
0
0
0
2.
Set the divide-by ratio for timer 1. To divide B
timer 1 base register (TM1BR). (The valid range for TM1BR is 0 to 255.)
TM1BR (example)
Bit:
7
6
5
4
TM1
TM1
TM1
TM1
BR7
BR6
BR5
BR4
Setting:
0
0
1
0
135

Panasonic

/4 by 39. The example uses the
OSC
CORE
ROM, RAM
Interrupts
Bus Controller
Timers 0-1
Serial I/Fs
Timers 2-3
ADC
Timers 4-5
3
2
1
0
TM1
TM1
S1
S0
0
0
0
0
OSC
3
2
1
0
TM1
TM1
TM1
TM1
BR3
BR2
BR1
BR0
0
1
1
0
Panasonic Semiconductor Development Company
P1
P3
P5
x'00FE21'
/4 by 39, write x'26' to the
x'00FE11'

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