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Panasonic Semiconductor Development Company
MAXMIN: CRI Interval Maximum and Minimum Register
(MAXMINW
Bit:
15
14
13
12
MAX7 MAX6 MAX5 MAX4 MAX3 MAX2 MAX1 MAX0 MIN7 MIN6 MIN5 MIN4 MIN3 MIN2 MIN1 MIN0
Reset:
0
0
0
0
R/W:
R
R
R
R
MAX[7:0]: Maximum value during the CRI interval
Valid range: x'00' to x'FF'
MIN[7:0]: Minimum value during the CRI interval
Valid range: x'00' to x'FF'
SLICE: VBI Data Slice Level Register
(SLICEW
Bit:
15
14
13
12
SLSF
SLSF
SLSF
SLSF
SLSF
7
6
5
4
Reset:
R/W:
R/W
R/W
R/W
R/W
R/W
SLSF[7:0]: VBI data slice level—software setting
Valid range: x'00' to x'FF'
SLHD[7:0]: VBI data slice level—hardware calculation
Valid range: x'00' to x'FF'
Composite signal
from ADC
SLHD
SLSF
Figure 9-12 SLSF and SLHD Multiplexing
238
Panasonic
Closed-Caption Decoder
Closed-Caption Decoder Registers
11
10
9
8
7
6
0
0
0
0
1
1
R
R
R
R
R
R
11
10
9
8
7
6
SLSF
SLSF
SLSF
SLHD
SLHD
3
2
1
0
7
6
R/W
R/W
R/W
R
R
Compare
MUX
SLICESEL
MN102H75K/F75K/85K/F85K LSI User Manual
x'007E02'
x'007E22')
5
4
3
2
1
1
1
1
1
1
R
R
R
R
R
x'007E04'
x'007E24')
5
4
3
2
1
SLHD
SLHD
SLHD
SLHD
SLHD
SLHD
5
4
3
2
1
R
R
R
R
R
0/1 data
0
1
R
0
0
R
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