Panasonic MN10285K User Manual page 64

Interrupts
Interrupt Control Registers
MN102H75K/F75K/85K/F85K LSI User Manual
ADM1ICL: Address 1 Match Interrupt Control Register (Low)
Bit: 7 6 5 4
ADM1
— — —
IR
Reset: 0 0 0 0
R/W: R R R R/W
ADM1ICL detects and requests address match 1 interrupts. It is an 8-bit
access register. Use the MOVB instruction to access it.
ADM1IR: Address match 1 interrupt request flag
0: No interrupt requested
1: Interrupt requested
ADM1ID: Address match 1 interrupt detect flag
0: Interrupt undetected
1: Interrupt detected
ADM1ICH: Address 1 Match Interrupt Control Register (High)
Bit: 7 6 5 4
— — — —
Reset: 0 0 0 0
R/W: R R R R
ADM1ICH enables address match 1 interrupts. It is an 8-bit access register.
Use the MOVB instruction to access it.
The priority level for address match 1 interrupts is written to the
ADM3LV[2:0] field of the ADM3ICH register.
ADM1IE: Address match 1 interrupt enable flag
0: Disable
1: Enable
ADM0ICL: Address 0 Match Interrupt Control Register (Low)
Bit: 7 6 5 4
ADM0
— — —
IR
Reset: 0 0 0 0
R/W: R R R R/W
ADM0ICL detects and requests address match 0 interrupts. It is an 8-bit
access register. Use the MOVB instruction to access it.
ADM0IR: Address match 0 interrupt request flag
0: No interrupt requested
1: Interrupt requested
ADM0ID: Address match 0 interrupt detect flag
0: Interrupt undetected
1: Interrupt detected
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3 2 1 0
ADM1
— — —
ID
0 0 0 0
R R R R
3 2 1 0
ADM1
— — —
IE
0 0 0 0
R R R R/W
3 2 1 0
ADM0
— — —
ID
0 0 0 0
R R R R
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