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Panasonic Semiconductor Development Company
Table 9-4 Current Level Control
Low Current
Control
Conditions
(1)
10
A
Off
4
A
9
Off
1
A
3
Off
A= 0
Off
-3
A
-1
On
-9
A
-4
On
A
-10
On
Notes:
1. A = compare level - reference level
2. The numbers (1) to (6) correspond to the same number in figure 9-5.
Table 9-5 provides the registers used to control and monitor the clamping circuit.
See the page number indicated for register and bit descriptions.
Table 9-5 Control Registers for Clamping Circuit
CCDO
Register Page
Address
Register for selecting the low-pass filter
NFSEL
242
x'007EC0'
Registers for controlling clamping
SCMING
243
x'007EC4'
SYNCMIN
244
x'007EC8'
BPPST
243
x'007EC6'
CLAMP
245
x'007ECC' x'007EEC
CLPCND
248
x'007EDC' x'007EEC
1
9.3.3
Sync Separator Circuit
A low-pass filter and a sync separator comprise this block. The sync separator
extracts HSYNC and VSYNC from the composite video signal. Figure 9-6 shows
a block diagram of the circuit, and table 9-6 provides the registers used to control
and monitor it. See the page number indicated for register and bit descriptions.
230
Panasonic
Closed-Caption Decoder
Functional Description
Current Source
Medium Current
(2)
(3)
(4)
On
Off
On
On
Off
On
On
Off
Off
Off
Off
Off
Off
Off
Off
Off
On
Off
Off
On
Off
CCD1
Address
Description
x'007EE0'
Noise filter select register
x'007EE4'
Minimum sync level detection interval set
register
x'007EE8'
Sync and pedestal level register
x'007EE6'
Backporch position register
Clamping control register
'
Clamping control signal status register 1
'
MN102H75K/F75K/85K/F85K LSI User Manual
High Current
(5)
(6)
Off
On
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
On
Off
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