Mitsubishi 00JCPU User Manual page 220

(a) When only a step number is specified
Monitor data is collected when the status immediately before execution of the specified step becomes the
specified status.
The following status can be specified.
• When the operation of the specified step changes from the non-execution status to the execution status:
<-P->
• When the operation of the specified step changes from the execution status to the non-execution status:
<-F->
• Always only when the operation of the specified step is in execution: <ON>
• Always only when the operation of the specified step is in non-execution: <OFF>
• Always regardless of the status of the operation of the specified step: <Always>
●
If a step between the AND/OR blocks is specified as a monitor condition, monitor data is collected when the status
previous to execution of the specified step is specified by the LD instruction.
The monitor timing depends on the step specified as a monitor condition.
The following shows examples of monitoring when the step 2 is on (Step No. [2] = <ON>).
• When the step 2 is connected by the AND instruction:
In Figure 6.28, the monitor execution condition is established when both X0 and X1 are on.
• When the step 2 is connected in the middle of the AND/OR block:
In Figure 6.29, the monitor execution condition is established when X1 turns on. (The on/off status of X0 does not
affect the establishment of the monitor execution condition.)
• If the start of a ladder block other than the step 0 is specified for the step number as a detailed condition, monitor
data is collected when the execution status of the instruction immediately before execution becomes the specified
status.
If (Step No. [2] = <ON>) is specified in the following ladder, monitor data is collected when OUT Y10 turns on.
Figure 6.30 When the start of a ladder block other than the step 0 is specified for the step number
●
Be sure to set the condition of the step set as step No.0 to "Always".
6 - 40
Ladder mode
X0 X1 X2
0
Figure 6.28 When the step 2 is connected by the AND instruction
Ladder mode
X0 X1 X2
0
X3
Figure 6.29 When the step 2 is connected in the middle of the AND/OR block
Ladder mode
X0
0
X1
2
Step 2
Y20
Step 2
Y20
Y10
Y11
List mode
0 LD XO
1 AND X1
2 AND X2
3 OUT Y2
List mode
0 LD XO
1 LD X1
2 AND X2
3 OR X3
4 ANB
5 OUT Y20
List mode
0 LD XO
1 OUT Y10
2 LD X1
3 OUT Y11