Mitsubishi 00JCPU User Manual page 312

Table6.37 Restrictions that apply to all the high speed interrupt setting (continued)
Item
File register that is the
File register that is the same name as a
same name as a
program name cannot be used.
program name
Local device Local devices cannot be used.
Command of the CPU access commands cannot be issued
intelligent function from the intelligent function module that
module that accesses accesses the CPU module such as the
the CPU module QJ71C24 or QJ71E71.
Monitoring via any of CC-Link IE Controller
Network modules, MELSECNET/H modules,
Monitoring via other or intelligent function modules such as the
stations QJ71C24 cannot be executed during
monitoring its own station
.
The interrupt counter corresponding to
Interrupt counter
interrupt pointer I49 cannot be used.
(2) Restrictions that apply to the high speed interrupt only
Item
In high speed interrupt programs, any device
Device comment comment that has the same name as the
program name is not saved and restored.
In high speed interrupt sequences, the index
Index register
register is not saved and restored.
In high speed interrupt programs, the access
Access execution flag
execution flag SM390 is not saved and
(SM390)
restored.
The high speed X/Y refresh area cannot be
Forced on/off
forced to turn on or off.
Monitoring condition No setting is allowed for the high speed
setting interrupt program.
Execution time No setting is allowed for the high speed
measurement interrupt program.
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Restriction
Table6.38 Restrictions that apply to the high speed interrupt only
Restriction
When used
The high interrupt cannot be executed at the specified intervals
since interrupts are disabled when switching to the file register
that is the same name as a program name. Because of this,
the following time is required.
• 410 s for the standard RAM
• 400 s+100 s Number of program files for an SRAM card
The high interrupt cannot be executed at the specified intervals
since interrupts are disabled when switching to a local device.
Because of this, the following time is required.
• 390 s+170 s n for the standard RAM
• 390 s+950 s n for an SRAM card
(n: number of program files)
Since interrupts are disabled when issuing a CPU access
command, the high speed interrupt cannot be executed at the
specified intervals due to delay of the start.
• Reading or writing of N points: (0.07 N+34) s
• Random reading or writing of N points: (0.07 N+101) s
If a self-monitoring request and a request for monitoring via
any intelligent function module are overlapped, interrupt-
disabled time is increased. The high speed interrupt cannot be
executed at the specified intervals due delay of the start
(102 s).
Even if the interrupt counter is set, the setting for I49 is
ignored, and the high speed interrupt I49 is executed normally.
(Interrupt programs of other interrupt pointers are not
executed, and the interrupt counter is executed.)
When used
The written device comment of the high speed interrupt
program is changed.
The index register of the high speed interrupt program is
changed.
The SM390 value of the high speed interrupt program is
changed.
The forced on/off is not executed in the high speed interrupt,
being ignored.
(No timeout error will occur.)
The setting is not executed normally.
(No timeout error will occur.)
The setting is not executed, being ignored.
(No timeout error will occur.)