HP 64746 User Manual page 531

Num Description
25 AS,DS negated to data invalid
26 Data Out to DS asserted write
27 Data Valid to Clock low (setup)
28 AS,DS negated to DTACK negated
29 AS,DS negated to Data in (hold)
30 AS,DS negated to BERR negated
31 DTACK asserted to data in-setup
32 Halt, Reset input transition
33 Clock High to BG asserted
34 Clock High to BG negated
35 BR asserted to BG asserted
36 BR negated to BG negated
37 BGACK asserted to BG negated
37A BGACK asserted to BR negated
38 BG asserted to high Z
39 BG width negated
44 AS,DS negated to AVEC negated
46 BGACK width low
47 Async input setup time
48 BERR asserted to DTACK asserted
Chapter 14: Specifications and Characteristics
Emulator Specifications and Characteristics
Processor
Unit Symbol Min Max Min Max Min Max
ns Tshdoi 15
ns Tdosl 15
ns Tdicl 7
ns Tshdah 0
ns Tshdii 0
ns Tshdeh 0
ns Tdaldi -
ns Trhr, -
Trhf
ns Tchgl -
ns Tchgh -
clks Tbrlgl 2.5
clks Tbrhgh 1.5
clks Tgalgh 2.5
ns/ Tgalbrh 10
clks
ns Tglz -
clks Tgh 1.5
ns Tshvph 0
clks Tgal 1.5
ns Tasi 10
ns Tbeldal 10
Emulator
Worst Typical
- 10 - 16
- 10 - 16
- 21 - 15
110 0 90 0
- 0 - 0
- 0 - 0
50 43 - 49
150 - 150 -
30 - 45 -
30 - 60 -
4.5 2.5 4.5 2.5
2.5 1.5 2.5 1.5
4.5 2.5 4.5 2.5
1.5 20 1.5 10
50 - 50 -
- 1.5 - 1.5
50 0 30 0
- 1.5 - 1.5
- 20 - 15
- 20 - 15
-
-
-
100
-
-
-
<150
40
40
4.5
2.5
4.5
1.5
50
-
40
-
-
-
531