HP 64746 User Manual page 330

Emulation/analysis
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Chapter 9: Using the External State Analyzer
Configuring the External Analyzer
If no slave clock has appeared since the last master clock, the data on the lower 8
bits of the pod will be latched at the same time as the upper 8 bits. If more than one
slave clock has appeared since the last master clock, only the first slave data will be
available to the analyzer (see the figure below).
330

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