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Specifications
E5023A Specifications
Table 6-27
(E5036A Filter Matrix Module)
Filters:
Bit Error Measurement
Table 6-28
(E5039B Bit Error Rate Measurement Module) (Optional)
Data Rate:
Input Level:
Reference Clock:
Measurement Data:
Bit Error Rate Range:
Number of Sectors/track:
Number of Symbol Error Count:
Error Memory:
Symbol Error Length Histogram:
Table 6-29
(E5039C Bit Error Rate Measurement Module) (Optional)
Data Rate:
Data Pattern:
Input Signal Level:
Bit Error Rate Range:
Number of Sectors/track:
Number of Symbol Error Count:
Error Logging:
Burst Error Counter:
Lost Sector Counter:
BER Functions:
330
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Four selectable filters
50 Mbps to 1.2 Gbps
(depends on the Data Rate of a PRML chip)
< 400 mVp-p (isolated pulse)
1M to 100 MHz (TTL Level)
128 kByte (max) / Segment 8 Segment (max)
≤ 1×10
-9
≤ 1,024 Sectors
65,536 Symbols (max)
Record the error codes and offset address values
for up to 65,536 symbols
65,536 counts (for the length 1 to 10)
50 Mbps to 2.6 Gbps
(depends on the Data Rate of a PRML chip)
Arbitrary 4 kBytes × 4 segments
< 400 mVp-p (isolated pulse)
≤ 1×10
-9
≤ 1,024 Sectors
65,536 Symbols (max)
512 k Symbols (8 bit/symbol)
4,095 burst errors that exceed given threshold
error length (1 to 31)
1,024 counts/track, number of unsynchronized
sector
Multiple register sweep, Error threshold, User
sync pattern, Sector ignore
Chapter 6
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