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Field
Options
CHANNEL
Information only
INTERFACE
V.11, V.24, V.35, RS449
MODE
Agg,
Trib,
TDM
TYPE
DTE,
DCE
FORMAT
Sync,
NRZ,
NRZI,
8N1,
8N2,
7E1,
7E2,
7O1,
7O2,
7N1,
7N1.5,
5N1,
5N1.5
FORMAT (ASYNC)
R,
E,
C
RX CLOCK RATE
50-2048000bps
RX CLOCK SOURCE
Ext,
Txc,
PLL,
Int,
Dba
RX CLOCK
-
REFERENCE
<GTX,
<GRX
V100 Versatile Multiplexer Technical Manual Version 2.2
C H A P T E R
Description
Displays the numbers of all data channels
installed in the unit on a separate line.
Electrical interface standard used on the port.
Channel is used as an Aggregate
Channel is a tributary
Channel is a tributary, multiplexed through TDM
port
Port is configured as Data Terminating Equipment
(TX is an output)
Port is configured as Data Communications
Equipment (TX is input)
Data is transparent synchronous
Data is synchronous, HDLC Non-Return to Zero
format
Data is synchronous, HDLC Non-Return to Zero
Inverted format
Data is async, 8bits, no parity, one stop
Data is async, 8bits, no parity, two stop
Data is async, 7bits, even parity, one stop
Data is async, 7bits, even parity, two stop
Data is async, 7bits, odd parity, one stop
Data is async, 7bits, odd parity, two stop
Data is async, 7bits, no parity, one stop
Data is async, 7bits, no parity, 1.5 stop
Data is async, 5bits, no parity, one stop
Data is async, 5bits, no parity, 1.5 stop
Raw data passed transparently
Error-correction active
Compression active (error-correction is
automatic)
Receive clock bit rate. This may be set at any
rate from
50 to 2048000bps (synchronous) or
50 to 115200bps (asynchronous)
RX clock input from the interface
RX clock output, looped from TX
RX clock output, derived from PLL
RX clock output, phase-locked from system clock
Dynamic Bandwidth Allocation (output)
None
The reference for the TX PLL is taken from the
Global RX Clock bus
The reference for the RX PLL is taken from the
Global RX Clock bus
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