Table of Contents
Advertisement
CP3002-RC/CP3002-RA
4.3.12
Watchdog Timer Control Register (WTIM)
The CP3002-RC/CP3002-RA has one Watchdog timer provided with a programmable timeout
ranging from 125 msec to 4096 sec. Failure to strobe the Watchdog timer within a set time
period results in a system reset or an interrupt. The interrupt mode can be configured via the
Board Interrupt Configuration Register (0x286).
There are four possible modes of operation involving the Watchdog timer:
•
Timer only mode
•
Reset mode
•
Interrupt mode
•
Dual stage mode
At power on the Watchdog is not enabled. If not required, it is not necessary to enable it. If re-
quired, the bits of the Watchdog Timer Control Register must be set according to the application
requirements. To operate the Watchdog, the mode and time period required must first be set
and then the Watchdog enabled. Once enabled, the Watchdog can only be disabled or the
mode changed by powering down and then up again. To prevent a Watchdog timeout, the
Watchdog must be retriggered before timing out. This is done by writing a '1' to the WTR bit. In
the event a Watchdog timeout does occur, the WTE bit is set to '1'. What transpires after this
depends on the mode selected.
The four operational Watchdog timer modes can be configured by the WMD[1:0] bits, and are
described as follows:
Timer only mode - In this mode the Watchdog is enabled using the required timeout period. Nor-
mally, the Watchdog is retriggered by writing a '1' to the WTR bit. In the event a timeout occurs,
the WTE bit is set to '1'. This bit can then be polled by the application and handled accordingly.
To continue using the Watchdog, write a '1' to the WTE bit, and then retrigger the Watchdog
using WTR. The WTE bit retains its setting as long as no power down-up is done. Therefore,
this bit may be used to verify the status of the Watchdog.
Reset mode - This mode is used to force a hard reset in the event of a Watchdog timeout. In
addition, the WTE bit is not reset by the hard reset, which makes it available if necessary to
determine the status of the Watchdog prior to the reset.
Interrupt mode - This mode causes the generation of an interrupt in the event of a Watchdog
timeout. The interrupt handling is a function of the application. If required, the WTE bit can be
used to determine if a Watchdog timeout has occurred.
Dual stage mode - This is a complex mode where in the event of a timeout two things occur: 1)
an interrupt is generated, and 2) the Watchdog is retriggered automatically. In the event a sec-
ond timeout occurs immediately following the first timeout, a hard reset will be generated. If the
Watchdog is retriggered normally, operation continues. The interrupt generated at the first tim-
eout is available to the application to handle the first timeout if required. As with all of the other
modes, the WTE bit is available for application use.
ID 1039-3625, Rev. 1.0
Configuration
Page 4 - 13
Advertisement
Table of Contents
