Kontron CP3002-RC User Manual page 5

CP3002-RC/CP3002-RA
3.6 Hot Swap Procedures ............................................................................. 3 - 8
3.7 Installation of CP3002-RC/CP3002-RA Peripheral Devices ................... 3 - 8
3.7.1 SATA Flash Module Installation .................................................... 3 - 10
3.7.2 Rear I/O Device Installation .......................................................... 3 - 10
3.8 Software Installation .............................................................................. 3 - 10
4. Configuration ........................................................................... 4 - 3
4.1 Jumper Description ................................................................................. 4 - 3
4.1.1 COMB (RS-422) Termination Jumper Settings (JP1 and JP2) ....... 4 - 3
4.1.2 uEFI BIOS Configuration Jumper Settings (JP3 and JP4) ............ 4 - 3
4.2 I/O Address Map ..................................................................................... 4 - 4
4.3 CP3002-RC/CP3002-RA-Specific Registers ........................................... 4 - 5
4.3.1 Status Register 0 (STAT0) .............................................................. 4 - 5
4.3.2 Status Register 1 (STAT1) .............................................................. 4 - 6
4.3.3 Control Register 0 (CTRL0) ............................................................ 4 - 7
4.3.4 Control Register 1 (CTRL1) ............................................................ 4 - 7
4.3.5 Device Protection Register (DPROT) ............................................. 4 - 8
4.3.6 Reset Status Register (RSTAT) ...................................................... 4 - 9
4.3.7 Board Interrupt Configuration Register (BICFG) ........................... 4 - 10
4.3.8 Status Register 2 (STAT2) ............................................................ 4 - 11
4.3.9 Board ID High Byte Register (BIDH) ............................................. 4 - 11
4.3.10 Board and PLD Revision Register (BREV) ................................... 4 - 11
4.3.11 Geographic Addressing Register (GEOAD) ................................. 4 - 12
4.3.12 Watchdog Timer Control Register (WTIM) ................................... 4 - 13
4.3.13 Board ID Low Byte Register (BIDL) .............................................. 4 - 15
4.3.14 Debug LED Configuration Register (DLCFG) ............................... 4 - 16
4.3.15 Debug LED Control Register (DLCTRL) ....................................... 4 - 17
4.3.16 General Purpose Output Register (GPOUT) ................................ 4 - 18
4.3.17 General Purpose Input Register (GPIN) ....................................... 4 - 18
5. Power Considerations ............................................................ 5 - 3
5.1 System Power ......................................................................................... 5 - 3
5.1.1 CP3002-RC/CP3002-RA Baseboard .............................................. 5 - 3
ID 1039-3625, Rev. 1.0
Preface
Page v