I/O Address Map - Kontron CP3002-RC User Manual

Configuration
The default setting is indicated by using italic bold.
4.2

I/O Address Map

The following table indicates the CP3002-RC/CP3002-RA-specific registers.
Table 4-5:

I/O Address Map

ADDRESS
0x080 -
0x081
0x082 - 0x083
0x084
0x085
0x280
0x281
0x282
0x283
0x284
0x285
0x286
0x287
0x288
0x289
0x28A
0x28B
0x28C
0x28D
0x28E - 0x28F
0x290
0x291
0x292
0x293
Page 4 - 4
uEFI BIOS POST Code Low Byte Register (POSTL)
uEFI BIOS POST Code High Byte Register (POSTH)
Reserved
Debug Low Byte Register (DBGL)
Debug High Byte Register (DBGH)
Status Register 0 (STAT0)
Status Register 1 (STAT1)
Control Register 0 (CTRL0)
Control Register 1 (CTRL1)
Device Protection Register (DPROT)
Reset Status Register (RSTAT)
Board Interrupt Configuration Register (BICFG)
Status Register 2 (STAT2)
Board ID High Byte Register (BIDH)
Board and PLD Revision Register (BREV)
Geographic Addressing Register (GEOAD)
Reserved
Watchdog Timer Control Register (WTIM)
Board ID Low Byte Register (BIDL)
Reserved
Debug LED Configuration Register (DLCFG)
Debug LED Control Register (DLCTRL)
General Purpose Output Register (GPOUT)
General Purpose Input Register (GPIN)
CP3002-RC/CP3002-RA
DEVICE
ID 1039-3625, Rev. 1.0