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Supermicro SuperServer SYS-122H-TN User Manual page 68

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Notes:
The items with an asterisk (*) are the default settings in BIOS.
l
®
®
The Intel
Xeon
6700E-series processors CXL memory configurations are 1DPC
l
('Slot 0') only for native DDR5.
CXL Memory Channel: number of devices per root port, with root ports separated by
l
"+," e.g. 2+2+2+2 = four root ports populated with two devices per root port
CXL Interleave: sets x ways, e.g. 2x4 = One set of two modules, interleaved four-
l
way
CXL Modes:
l
1LM + Vol = DDR5 ('1LM') and (volatile) CXL memory visible to SW as separate
l
tiers, separately interleaved
Hetero x12 = DDR5 and (volatile) CXL memory interleaved together in one 12-
l
way set
Flat Memory Mode = HW manages data movement between DDR5 and CXL
l
memory, total capacity visible to SW
®
Intel
Xeon
(2 Processors and 32 DIMMs Installed, 1DPC)
1 Processor DIMM
Count
1 Processor and 1
DIMM
1 Processor and 4
DIMMs
1 Processor and 8
DIMMs
2 Processor DIMM
Count
(Recommended)
2 Processors and 8
DIMMs
2 Processors and 8
DIMMs
SuperServer SYS-122H-TN: Maintenance and Component Installation
®
6700E-series DDR5 Memory Population Table
Memory Population Sequence (1DPC)
P1-DIMMA1
P1-DIMMA1/P1-DIMMC1/P1-DIMME1/P1-DIMMG1
P1-DIMMB1/P1-DIMMD1/P1-DIMMH1/P1-DIMMF1
P1-DIMMA1/P1-DIMMB1/P1-DIMMC1/P1-DIMMD1/P1-DIMME1/P1-
DIMMF1/P1-DIMMG1/P1-DIMMH1
Memory Population Sequence (1DPC)
P1-DIMMA1/P1-DIMMC1/P1-DIMME1/P1-DIMMG1
P2-DIMMA1/P2-DIMMC1/P2-DIMME1/P2-DIMMG1
P1-DIMMB1/P1-DIMMD1/P1-DIMMF1/P1-DIMMH1
P2-DIMMB1/P2-DIMMD1/P2-DIMMF1/P2-DIMMH1
68

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