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TABLE 3-21
WJ-8718A/MFP
The microprocessor initiates a read operation to address 1020 (U4) and loads the
equipment address into Vl.
The 488M-A3 interface device (Ul) is programmed by the
microprocessor to determine if the address on incoming data matches the switch-established
address.
Table 3-21. Addresses 1020, 1028 Through 102F, and 10.60
Address Bit
2 3 22
2
1 2 0
2 3 2 2 2 1 2 0
2 3 2 2 2 1 2 0
2 3 22 2 1 2 0
Data Line
15 14 13 12
11 10
9
8
7
6
5
4
3
2
1
0
VI
0
0
0
1
0
0
0
0
0
0
1
0
1
0
0
0
Ul
0
0
0
1
0
0
0
0
0
0
1
0
1
0
0
1
VI
0
0
0
1
0
0
0
0
0
0
1
0
0
0
1
0
Vl
0
0
0
1
0
0
0
0
0
0
1
0
1
0
1
1
Vl
0
0
0
1
0
0
0
0
0
0
1
0
1
1
0
0
Vl
0
0
0
1
0
0
0
0
0
0
1
0
1
1
0
1
Vl
0
0
0
1
0
0
0
0
0
0
1
0
1
1
1
0
Vl
0
0
0
1
0
0
0
0
0
0
1
0
1
1
1
1
V4
0
0
0
1
0
0
0
0
0
0
1
0
a
0
a a
Ula
0
0
0
1
0
a a a
a
1
1
a
a
0
0
a
NOTE:
Data Lines 0-7
= ADO - AD7
Data Lines 8-15 = A8 - A15
3.3.1.5
Transceiver Network (U2 and U3)
Bidirectional bus transceivers, U2 and U3, are octal transmitter/receivers which
interface the TTL logic of Ul with the IEEE-488 Bus.
Either the transmitter or receiver in
each of the eight channels in both U2 and
V3
is enabled, forcing the disabled channel to a high
impedance state.
Transceiver U2 interfaces the DIO data lines.
Wh~n
the signal level at pin 1 is
high, data on the DIO lines transfer from the D to B ports and, when low, from the B to D.
Transceiver U3 interfaces the handshake and management control signals.
The
levels on the TE (Talk Enable) and DC (Direction Control) inputs, as well as the bus signal ATN,
determine the direction of signal flow. (See Table 2-18 for an explanation of the handshake and
management control line abbreviations used in the following discussion.)
3-44
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