Watkins-Johnson Company WJ-8718A/MFP Instruction Supplement page 93

Microprocessor front panel option
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TABLE 3-15
WJ-8718A/MFP
Input B controls the output of the manual RF gain voltage.
When manual AGC is
selected, input B is held high and the voltage from channel
X
is output to the amplifier U24D
through channel Yl to Y. When the receiver is in either fast or slow AGC, input B is held low
and the RF gain voltage is turned off by the ground on channel YO to Y.
Input C controls the audio output connected to the PHONES jack. In any detection
mode but ISB, the audios on the ring and tip of the front panel stereo PHONES jack are the
same. In ISB detection mode, U22 switches the audio so that the USB audio is on the tip of the
jack and LSB audio is on the ring, allowing both audios to be monitored with a 600 ohm stereo
headphone. Input
C
is held high by the latch U9 ISB output, connecting the ISB audio to feed
through channel Z1 to Z.
3.2.5.6
Registers
(U5, U9,
U21)
Three registers serve as storage devices for the control of the IF section of the
receiver. Each register latches the data on its D inputs to the
Q
outputs on a positive-going
transition of its clock pulse.
To initiate a write operation, the microprocessor places the address of the device
on the data bus and issues the ALE signal, latching the lower-order bits of the address into U8.
The processor pulls the WR line low and address decoder Ull is enabled.
Ull decodes the
address latched by U8, and the Y output connected to the clock or clock pulse input of the
addressed device goes low. YO is the clock input U21B, and Yl, Y2, and Y7 are the clock pulse
inputs to U5, U9 and U21A respectively.
The processor then pulls the WR line high, signaling that the data is on the bus. At
this point, the high level on WR disables U11, and the Y output that was low makes a positive
transition. This positive-going pulse latches the data into the addressed device.
3.2.5.7
Bandwidth, BFO Inhibit, and AGC
Dump (US)
The bandwidth storage register U5 holds the bandwidth code for the particular
bandwidth and detection mode selected. Table 3-15 lists the bandwidth code.
The
Q5
output controls the
AGC
Dump circuitry used during scan operation to hold
off any energy in the AGC circuitry. When held high, all signal strength is shut off. The Q7
output inhibits the BFO input when not in CW operation. Refer to Table
3-16
for the U5 data
word.
Table
3-15.
Bandwidth Code
Selected Bandwidths
Selected Bandwidths
16 kHz
6 kHz
3.2 kHz
1 kHz
.3 kHz
Active U5 Outputs
Q6
Q6
Q6
Q?
Q2
Q4
Q3
Q2
Ql
QO
3-38

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