Watkins-Johnson Company WJ-8718A/MFP Instruction Supplement page 83

CIRCUIT DESCRIPTION
WJ-8718A/MFP
cycle, an external device address is placed on the data bus. The address is dividedbetween the
higher-order 8-bit address (A8 through A15) and the lower-order 8-bit address/data bus (ADO
through AD7). The eight lower-order address bits are latched into external devices by the
Address Latch Enable (ALE) signal. During the remaining portion of the machine cycle the bus
is used for data.
The microprocessor provides RD, WR, and ALE outputs for bus control; and RST
5.5, RST 6.5, and RST 7.5 for interrupts. RST 7.5 is used for timing
events
and is driven by an
RC oscillator circuit UllB and UllC. RST 5.5 and RST 6.5 are only used when an optional
remote I/O is installed.
The microprocessor is driven by oscillator circuit UUE and UUD at a frequency of
approximately 2 MHz; this is internally divided by 2 to give the bus an operating speed of
1 MHz.
3.2.4.2
Power Up/Down Circuit (U11)
The Power Up/Down Detect circuit drives the RESET IN input to the Intel 8085A
Microprocessor. When this input goes low all operations stop and -all bus outputs become a high
impedance state. The input to the circuit is unregulated 10 V, dropped to approximately 1.5 V
by VR1, R2, CR1, and R3. This voltage keeps the U11A input slightly above threshold and
enables the RESET IN input to be high, allowing the microprocessor to operate.
During power-on, R6 and C9 provide an RC time constant to allow the micro-
processor to become fully energized before being released to start operation. CR2 isolates U11
from the RC circuit. During power-down, the U11A input goes below threshold causing the
UHF output to go low; this biases CR1 and discharges C9, resetting the microprocessor in the
process.
3.2.4.3
Read-Only Memory(U1, U2)
The Synthesizer Interface Board houses two 32,768-bit
(8K
x 8) ultraviolet erasable
and electrically programmable read-only memories (EPROMs), U1 and U2.
Prior to shipment, the EPROMs are programmed with the microprocessor instruc-
tion set. Before programming, all bits in the EPROM are in a 1 state. Data is introduced by
selectively programming Os into the desired bit locations (see Table 3-7). The only way a 0 can
be changed to a 1 is through ultraviolet erasure. Erasure occurs when the EPROM window is
exposed to light with wavelengths shorter than approximately 4000 Angstroms. Exposure to
sunlight, and certain types of fluorescent lamps with wavelengths in the 3000 to 4000
Angstroms range, should be
avoided
to
prevent
unintentional erasure.
3.2.4.3.1
EPROM Operation
Power required for the operation of each EPROM is +5 Vdc. The programmed
read-only memory
devices,
U1 and U2,
have
two modes of operation: read and standby. All
inputs are TTL levels.
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