Wr Timing Diagram - Watkins-Johnson Company WJ-8718A/MFP Instruction Supplement

FIGURE 3-8
WJ-8718A/MFP
A8-AJ5
___X. . . .
V_A_L_I_D_A_D_DR_E_SS
X'- _
ADO-AD7 - - - -<AO-A7
X
D_o_-_D_7
X _
ALE--~----------_/
-"-
WR - - - - - - , /
Figure 3-8. WR Timing Diagram
3.2.4
TYPE 794275-X
S.Yl'jT!I.~IZER
INTERFACE AND MEMORY BOARD (MFP-A4)
The Synthesizer Interface Board replaces the Manual Tuning Up/Down Counter
(A6Al) in the WJ-8718A HF Receiver. The board contains the Intel 8085A Microprocessor,
which is the control for the MFP Option. Random Access Memory (RAM) provides temporary
storage, and Erasable Programmable Read Only Memory (EPROM) contains the microprocessor's
instruction program. The board interfaces the microprocessor data bus with the BFa and La
Synthesizers through data latches. Figure 3-9 is a simplified block diagram of the MFP-A4
board and Figure 6-6 is the schematic diagram.
3.2.4.1
Microprocessor
(UI8)
The Intel 8085A Microprocessor is an 8-bit general purpose microprocessor that
requires a single +5 V supply. The microprocessor contains eight addressable 8-bit general
purpose registers and two 16-bit non-addressable registers which make up the CPU.
A multiplexed data bus allows the microprocessor to communicate with external
devices. The execution of the microprocessor program consists of a series of machine cycles.
Each machine cycle contains a series of clock cycles. During the first clock cycle of a machine
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