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CIRCUIT DESCRIPTION
WJ-8718A/MFP
flip-flop U21B via data line ADO. The bit level is latched to the
Q
output of U21B when the
clock input makes a positive transition. From U21B, the pulse representing the local/remote
code is applied to the select input of U22. U22 switches between manual and remote RF gain
voltage.
3.2.5.10
AUDIO ON/OFF (U21A, U16A, U16H)
Register U21A (address 1017) provides a select level to analog switches U16A and
U16B which, in turn, provide audio squelching during scan operation. The output of U21A is low
in normal operation allowing both audio channels to be routed to the front panel. During scan
operation, the microprocessor provides a high level on the AD7 input to the register. The bit is
latched to the Q output on the positive-going transition of the clock input. When their select
inputs are held high, U16A and U16B become an open circuit and provide a squelched audio
output.
3.2.5.11
AID Converter (U25)
Analog-to-digital converter U25 (address 1014) is made up of an eight-channel,
multiplexed analog switch, an 8-bit
AID
converter, address decode circuitry, and a tri-state
output buffer.
Seven of the eight channel i.nputs to the multiplexer are connected to receiver
signals and are monitored during receiver operation. Signal strength is monitored if scan, COR,
or remote operation is being utilized. All other inputs are used during Built-In Test Equipment
routines if the software program provides this feature.
To select an input, a select address code must be written to the A, B, and C inputs
of the A/D converter. Table 3-18 shows the input states for the three address lines which are
connected to AD4, AD5 and AD6 of the microprocessor. To select a channel, the address lines
are latched into the address decoder by the low-to-high transition of the
AID
ALE input. The
AID
ALE
input~es
low when a WR to address 1014 occurs and decoder Ull output Y4 goes
low. When the WR signal returns to a high state, the output of U19C transitions high, latching
in the address data into the address decoder.
After a channel has been selected, the data can be read from the output buffer by
placing a microprocessor read instruction to address 1014 on the bus. This causes decoder Ull
output Y4 to go low, as well as the output of UI9D. The low from U19D is then inverted by
U14C to enable the tri-state output buffer of the
AID
converter. This places the conversion
data in the buffer onto the bus for the microprocessor to accept.
The converter is the heart of the single-chip multiplexed A/D.
The converter
comprises three major parts:
the 256R ladder network, a successive approximation register
(SAR), and a comparator.
Continuous conversion is accomplished by tying the EOC (end of
conversion) output to the ST (start conversion) input. The SAR is reset on the positive edge of
the ST pulse and initiates conversion on the falling edge.
A reset is applied on power-up
through U19B to the ST input, to ensure conversion start.
3-40
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