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TABLE 3-2
WJ-8718A/MFP
3.1.3.2.1
U19 Enable
As shown in Table 3-1, U19 is enabled by a high logic level on Gl and a low logic
level on both G2A and G2B. The G2A and G2B inputs are the signals carried on the AD4 and
AD5 bits of the microprocessor data bus (latched by UI8); both address bits must be low to
enable U19. The Gl enable input is the output of AND gate UI5B.
The only time the U15B
output is high is when both inputs, the AD6 and A12 address bits, are high. Table 3-2 lists the
binary equivalent of the four hexadecimal address digits of all addressable devices on the Front
Panel Encode Board, and shows that the U19 enabling conditions exist when anyone of the
hexadecimal addresses 1040, 1042 through 1046, or 1048 has been on the data bus and latched by
U18.
Table 3-2. Front Panel Encode Address Data
Bus Line
A
AD
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
1
1
0
0
0
1
0
0
0
0
0
1
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
1
0
1
0
0
0
1
0
0
0
0
0
1
0
0
0
1
1
0
0
0
0
1
0
0
0
0
0
1
0
0
1
0
0
0
3.1.3.2.2
U19 Select
U19 is a 3-to-8 line decoder.
When U19 is enabled, the levels on the A, B, and C
select inputs determine which Youtput goes low. The A, B, and C inputs carry the levels on the
ADl, AD2, and AD3 bus lines.
Refer to Table 3-1 and note that the conditions required for YO to go low are:
C
=
0, B
=
0, and A
=
O. Table 3-2 shows that the only time that AD3 (C), AD2 (B), and AD1 (A)
are low at the same time is when the hexadecimal address is 1040. This is the address for read-
only device U17, described in paragraph 3.1.3.16. Y4 goes low on a RD to address 1048, used by
the microprocessor to reset U17.
Likewise, the U19 truth table shows that Yl is low when C
=
0, B
=
0, and A
=
1.
Table 3-2 shows that AD3
(C)
=
0, AD2 (B)
=
0, and ADI (A)
=
1 when the address is either 1042
or 1043. The U19Yl signal is the enabling pulse to Ul, addressed by either 1042 or 1043 and
described in paragraph 3.1.3.4.
The U19 truth table shows that Y2 is low when
C
=
0,
B
=
1, and A
=
O.
Table 3-2
shows that AD3
(C)
=
0, AD2 (B)
=
0, and ADI (A)
=
0 when the address is either 1044 or 1045.
These are the addresses for U2, enabled by Y2 and described in paragraph 3.1.3.9.
3-8
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