Watkins-Johnson Company WJ-8718A/MFP Instruction Supplement page 107

CIRCUIT DESCRIPTION WJ-8718A/MFP
3.4.1. 7
Universal Synchronous/Asynchronous Receiver/Transmitter (USART, U1)
The USART (U!) is a peripheral device designed for data communications. The
USART receives and transmits data between the microprocessor on the IF Interface Board and
external control equipment. The functional format of the USART is programmed by the
microprocessor prior to data transmission.
Internal to the USART, an 8-bit data bus coordinates the exchange of data between
buffers, logic, and control circuits in response to control and handshake signals applied to the
USART by external devices. Basically, the USART provides two services in response to the
externally applied signals: it converts parallel data from the microprocessor to a serial data
stream for transmission to the remote controller, or it converts a serial stream of data from
the controller to a parallel format for transmission to the microprocessor. The USART
generates signals which inform the microprocessor and the controller when it is ready to
transmit or receive, ensuring the orderly transfer of data. Data are transmitted from the
USART on the TxD line and received by the USART on the RxD line (paragraphs 3.4.1.7.14 and
3.4.1. 7 .15).
The activities of the USART are timed by the CLK, RxC, and TxC inputs, and
regulated by the logic levels on the control input lines (RESET, CS, C/D, RD, and WR) and the
handshake input lines (CTS and DSR). The signals generated by the USART are Rx RDY and Tx
RDY to the microprocessor, and RTS and DTR to the remote controller. The input and output
signals are described in paragraphs 3.4.1.7.1 through 3.4.2.7.15.
3.4.1. 7.1
RESET Signal
A high logic level on the RESET line resets the internal circuits of the USART.
The RESET signal is generated by the microprocessor when power is applied. Following reset
and prior to data transmission, the USART must be programmed by the microprocessor.
The programming procedure establishes general operating characteristics of the
USART and must follow each USART reset.
3.4.1. 7.2
Clock Input
The Clock (CLK) input is provided to establish the time base for internal activities
of the USART. Clock rate is established by the baud rate generator, U5.
3.4.1. 7.3 Receiver Clock/Transmitter Clock
The Receiver Clock (RxC) and the Transmitter Clock (TxC) establish the rate of
data transmission. Characters are shifted out of the USART on the falling edge of TxC. Input
data are sampled on the rising edge of RxC. The rate of the two clock signals is established by
coded entries to the SI switch assembly (paragraph 3.4.1.5), whose 16 selectable rates are
between 50 and 19,200 baud. RxC and TxC are 16 times the baud rate.
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