Watkins-Johnson Company WJ-8718A/MFP Instruction Supplement page 124

WJ-8718A/MFP MAINTENANCE
The functional portion of a module is typically fed by the microprocessor data bus
and is placed on or off the bus by a toggle-type clock or enabling signal from the address decode
circuits.
It
is the enabling signal which causes the function circuit to appear visible or invisible
to the microprocessor. In the disabled state, the function circuit is an open circuit. The
function circuitry can be a logic gating network, a memory device, or a complex chip desi.gned
for a specific purpose. The circuitry often consists of a primary-purpose integrated circuit with
one or more support circuits. In some cases, the primary function circuit is always on and must
be interfaced to the bus by an external tri-state buffer which guarantees that the .processor
looks at the circuit at the proper time. Other primary function ICs ~ontain internal tri~state
buffers.
The modular concept simplifies troubleshooting by providing a pattern of similarity
in circuit characteristics throughout the microprocessor system, allowing application of
generali ties which apply to each module. Thesegenerali ties are listed below.
1.
During the execution of its program, the microprocessor communi-
cates with each module on the bus, enabling one functional circuit at
a time through address capture/decode circuits. If an enable signal is
held high throughout the run of the program, the microprocessor
cannot communicate with the module. If the signal is held low, the
module will always be on the bus, receiving data intended for other
devices. A logical approach to modular troubl.eshooting is to verify
that the enabling outputs of the address capture/decode network are
toggling.
2. If the address decode outputs do not toggle, the enable or clock
inputs to the address decode and capture ICs should be verified.
These inputs are typically gated combinations of the ALE, RD, and
WR microprocessor signals and selected upper-order address lines.
Absence of the proper levels on the clock or enabling inputs is often
the result of defects in the solder connections or logic gates in the
path of the signals. Successful execution of the BITE program
(paragraph 4.1.1.1) verifies that the RD, WR, ALE, and upper order
data lines are operational.
3. The BITE program also verifies that the ADO through AD7 address/
. data lines are functional, and it can be assumed that the address
capture IC is receiving address information. Troubleshooting efforts
should next be directed toward the address capture and decode ICs.
4. If the functional IC enable input is toggling, but the IC function is not
operational, support ICs should be examined. Support ICs are
integrated circuits which perform services for the functional circuit.
Services are varied and include signal level inversion, generation of
timing signals, buffering, and multiplexing.
5. If a functional ICis mounted on sockets, the circuit can be replac.ed
by an identical IC known to be operational. Observation of changes
in operating characteristics will aid in isolation of a
defe~tive
IC.
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