Mitsubishi Electric L26CPU-BT User Manual page 405

Melsec-l cc-link system master/local module
Hide thumbs Also See for L26CPU-BT:
Table of Contents

Advertisement

(6) Link special registers (SW)
The link special registers store the data link status using word data.
Buffer memory addresses 600
For details on the link special registers (SW0000 to SW01FF), refer to
(7) Random access buffer
The random access buffer stores any data to be sent to other stations.
The reading and writing of data are performed using transient transmission.
(8) Communication buffer
The communication buffers stores the send and receive data when performing transient transmission
(communication using the communication buffers) between the local stations, standby master station, and
intelligent device stations.
The communication buffer sizes for the local station, standby master station, and intelligent device station are set
with network parameters.
For how to set the communication buffer size settings, refer to
[Example of communication using the communication buffers]
Master station
CPU
G(P).RIRD
Receive
buffer for the
first module
1) Accesses the buffer memory of the local station or the device memory of the CPU.
2) Stores the data specified by the control data in the receive buffer for the first module.
to 7FF
correspond to link special registers SW0000 to SW01FF.
H
H
1)
1)
2)
2)
Page 416, Appendix 3.2.
Page 83, Section 7.3.2 (2).
Local station (first module)
CPU
Buffer memory
Device memory
APPENDICES
A
403

Advertisement

Table of Contents
loading

This manual is also suitable for:

L26cpu-pbtLj61bt11

Table of Contents