Analog Devices ADV7610 Hardware User's Manual page 52

UG-438
Table 10 shows the default configurations for the various possible output interfaces.
Table 10. Default Audio Output Pixel Port Mapping
Output Pixel Port
I2S0
I2S1
I2S2
I2S3
Note: It is possible to tristate the audio pins using the global controls, as described in the Tristate Audio Output Drivers section. It is
possible to output SPDIF signal to the I
MUX_SPDIF_TO_I2S_ENABLE, Addr 68 (HDMI), Address 0x6E[3]
Enables muxing SPDF data into I
Function
MUX_SPDIF_TO_I2S_ENABLE
0 (default)
1
I 2 S/SPDIF Audio Interface and Output Controls
Two controls are provided to change the mapping between the audio output ports and the I
I2S_SPDIF_MAP_ROT[1:0], Addr 68 (HDMI), Address 0x6D[5:4]
A control to select the arrangement of the I
Function
I2S_SPDIF_MAP_ROT[1:0]
00 (default)
01
10
11
I2SBITWIDTH[4:0], Addr 68 (HDMI), Address 0x03[4:0]
A control to adjust the bit width for right justified mode on the I
Function
I2SBITWIDTH[4:0]
00000
00001
00010
...
11000 (default)
11110
11111
I2SOUTMODE[1:0], Addr 68 (HDMI), Address 0x03[6:5]
A control to configure the I 2
Function
I2SOUTMODE[1:0]
00 (default)
01
10
11
2 S pins (AP) using MUX_SPDIF_TO_I2S_ENABLE.
S pins (AP)
2
Description
Don't modify I2S outputs
Mux SPDIF into I2S pins
S/SPDIF interface on the audio output port pins.
2
Description
I2S0/SPDIF0 on I2S0, I2S1/SPDIF1 on I2S1, I2S2/SPDIF2 on I2S2, I2S3/SPDIF3 on I2S3
I2S3/SPDIF3 on I2S0, I2S0/SPDIF0 on I2S1, I2S1/SPDIF1 on I2S2, I2S2/SPDIF2 on I2S3
I2S2/SPDIF2 on I2S0, I2S3/SPDIF3 on I2S1, I2S0/SPDIF0 on I2S2, I2S1/SPDIF1 on I2S3
I2S1/SPDIF1 on I2S0, I2S2/SPDIF2 on I2S1, I2S3/SPDIF3 on I2S2, I2S0/SPDIF0 on I2S3
Description
0 bit
1 bit
2 bits
...
24 bits
30 bits
31 bits
S output interface.
Description
I 2 S mode
Right justified
Left justified
Raw SPDIF (IEC60958) mode
I 2 S /SPDIF Interface
I 2 S 0/SDPIF0
I 2 S 1/SDPIF1
I 2 S 2/SDPIF2
I 2 S 3/SDPIF3
2 S interface.
Rev. 0 | Page 52 of 184
Hardware User Guide
2 S and SPDIF (IEC60958) signals.