Analog Devices ADV7610 Hardware User's Manual page 10

UG-438
Ball No. Mnemonic
J1 P21
K1 P20
K2 P19
J2 P18
K3 P17
J3 P16
K4 LLC
J4 P15
K5 P14
J5 P13
K6 P12
J6 P11
K7 P10
J7 P9
K8 P8
J8 P7
K9 P6
J9 P5
H10 P4
H9 P3
G10 P2
G9 P1
F10 P0
E10 DE
F9 HS
E9 VS/FIELD/ALSB
D10, C10, I2S0 to I2S3
D9, C9
A9 SCLK/INT2
B9 LRCLK
A8 MCLK/INT2
B8 SCL
B7 SDA
A7 INT1
B6 RESET
A6 XTALP
A5 XTALN
B4 CEC
B5 CS
A3 DDCA_SCL
B3 DDCA_SDA
A2 RXA_5V
Type Description
Digital video output Video Pixel Output Port.
Digital video output Video Pixel Output Port.
Digital video output Video Pixel Output Port.
Digital video output Video Pixel Output Port.
Digital video output Video Pixel Output Port.
Digital video output Video Pixel Output Port.
Digital video output Line-Locked Output Clock for the Pixel Data (Range = 13.5 MHz to 162.5 MHz).
Digital video output Video Pixel Output Port.
Digital video output Video Pixel Output Port.
Digital video output Video Pixel Output Port.
Digital video output Video Pixel Output Port.
Digital video output Video Pixel Output Port.
Digital video output Video Pixel Output Port.
Digital video output Video Pixel Output Port.
Digital video output Video Pixel Output Port.
Digital video output Video Pixel Output Port.
Digital video output Video Pixel Output Port.
Digital video output Video Pixel Output Port.
Digital video output Video Pixel Output Port.
Digital video output Video Pixel Output Port.
Digital video output Video Pixel Output Port.
Digital video output Video Pixel Output Port.
Digital video output Video Pixel Output Port.
Miscellaneous digital Data enable (DE) is a signal that indicates active pixel data.
Digital video output Horizontal Synchronization Output Signal.
Digital input/output Vertical Synchronization Output Signal. FIELD is a field synchronization output
signal in all interlaced video modes. VS or FIELD can be configured for this pin.
The ALSB allows selection of the I
Miscellaneous digital Audio Output Pins. Pins can be configured to output S/PDIF digital audio output
(S/PDIF) or I
Miscellaneous digital A dual function pin that can be configured to output an audio serial clock or an
Interrupt 2 signal.
Miscellaneous digital Audio Left/Right Clock.
Miscellaneous digital A dual function pin that can be configured to output an audio master clock or an
Interrupt 2 signal.
Miscellaneous digital I 2 C Port Serial Clock Input Pin. SCL is the clock line for the control port.
Miscellaneous digital I 2 C Port Serial Data Input/Output Pin. SDA is the data line for the control port.
Miscellaneous digital Interrupt. This pin can be active low or active high. When status bits change, this
pin is triggered. The events that trigger an interrupt are under user configuration.
Miscellaneous digital System Reset Input. Active low. A minimum low reset pulse width of 5 ms is
required to reset the
Miscellaneous Input Pin for a 28.63636 MHz Crystal, or an External 1.8 V, 28.63636 MHz Clock
analog Oscillator Source to Clock the ADV7610.
Miscellaneous Crystal Input. Input pin for 28.63636 MHz crystal.
analog
Digital input/output Consumer Electronic Control Channel.
Miscellaneous digital Chip Select. Pulling this line up causes I
HDMI input HDCP Slave Serial Clock Port A. DDCA_SCL is a 3.3 V input that is 5 V tolerant.
HDMI input HDCP Slave Serial Data Port A. DDCA_SDA is a 3.3 V input that is 5 V tolerant.
HDMI input 5 V Detect Pin for Port A in the HDMI Interface.
Rev. 0 | Page 10 of 184
2 C address.
2 S.
ADV7610 circuitry.
2 C state machine to ignore I
Hardware User Guide
2 C transmission.