Hardware User Guide
As shown in Figure 47, the
ADV7610
controlled by the output control block in the CP block.
Primary:
•
Horizontal synchronization timing reference output on the HS pin
•
Vertical synchronization timing reference output on the VS/FIELD/ALSB pin
•
DE (indicates active region) shared with the FIELD pin
Secondary:
•
Field timing reference output on the DE pin or as a secondary signal on the VS/FIELD/ALSB pin
Timing reference signals with shared pins are controlled via I
Table 48. CP Synchronization Signal Output Pins
Pin Name
Primary Signal (Default)
DE
DE out
VS/FIELD/ALSB
VS out
The user can program the primary and secondary synchronization signals, repositioning them in order to control the display area, as
shown in Figure 48.
CP can output the following three primary and one secondary synchronization signals, which are
2
C.
VERTICAL BLANKING
DISPLAYED AREA
(ODD FIELD)
VERTICAL BLANKING
DISPLAYED AREA
(EVEN FIELD)
VERTICAL BLANKING
DISPLAYED AREA
(ODD FIELD)
Figure 48. Synchronization Repositioning and Displayed Area
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Secondary Signal
FIELD out
FIELD out
START_HS [9:0]
DE_H_START [9:0]
HSYNC/DE SIGNAL
UG-438
Controlled by I
2
C Bit
F_OUT_SEL
VS_OUT_SEL
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