Analog Devices ADV7610 Hardware User's Manual page 15

Hardware User Guide
Drive Strength Selection
DR_STR
It may be desirable to strengthen or weaken the drive strength of the output drivers for electromagnetic compatibility (EMC)
and crosstalk reasons. This section describes the controls to adjust the output drivers used by the CP and HDMI modes.
The drive strength DR_STR_SYNC[1:0] bits allow the user to select the strength of the following synchronization signals:
•
DE
•
HS
•
VS/FIELD
The DR_STR[1:0] drive strength bits affect output drivers for the following output pins:
•
P[23:0]
•
AP
•
SCLK
•
SDA
•
SCL
The drive strength DR_STR_CLK[1:0] bits affect output driver for LLC line.
DR_STR[1:0], IO, Address 0x14[5:4]
A control to set the drive strength of the data output drivers.
Function
DR_STR[1:0]
00
01
10 (default)
11
DR_STR_CLK[1:0], IO, Address 0x14[3:2]
A control to set the drive strength control for the output pixel clock out signal on the LLC pin.
Function
DR_STR_CLK[1:0]
00
01
10 (default)
11
DR_STR_SYNC[1:0], IO, Address 0x14[1:0]
A control to set the drive strength of the synchronization pins, HS, VS/FIELD/ALSB, and DE.
Function
DR_STR_SYNC[1:0]
00
01
10 (default)
11
Output Synchronization Selection
VS_OUT_SEL, IO, Address 0x06[7]
A control to select the VSync or FIELD signal to be output on the VS/FIELD/ALSB pin.
Function
VS_OUT_SEL
0
1 (default)
Description
Reserved
Medium low (2×)
Medium high (3×)
High (4×)
Description
Reserved
Medium low (2×) for LLC up to 60 MHz
Medium high (3×) for LLC from 44 MHz to 105 MHz
High (4×) for LLC greater than 100 MHz
Description
Reserved
Medium low (2×)
Medium high (3×)
High (4×)
Description
Selects FIELD output on VS/FIELD/ALSB pin
Selects VSync output on VS/FIELD/ALSB pin
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