Pixel Port Configuration; Pixel Port Output Modes - Analog Devices ADV7610 Hardware User's Manual

Hardware User Guide

PIXEL PORT CONFIGURATION

The ADV7610 has a very flexible pixel port, which can be configured in a variety of formats to accommodate downstream ICs. The
ADV7610 can provide output modes up to 24 bits.
This section details the controls required to configure the
configurations.

PIXEL PORT OUTPUT MODES

OP_FORMAT_SEL[7:0], IO, Address 0x03[7:0]
A control to select the data format and pixel bus configuration. Refer to the pixel port configuration for full information on pixel port
modes and configuration settings.
Function
OP_FORMAT_SEL[7:0]
0x00 (default) 1
0x0A 1
0x20
0x2A
0x40
0x60
0x80
0x8A
1 Refer to the DLL settings for 656, 8-/10-/12-bit modes in the DLL on LLC Clock Path section.
Bus Rotation and Reordering Controls
Bus reordering controls are available for ADV7610. OP_CH_SEL[2:0] allows the three output buses to be rearranged, thus providing six
different output possibilities.
OP_CH_SEL[2:0], IO, Address 0x04[7:5]
A control to select the configuration of the pixel data bus on the pixel pins. Refer to the pixel port configuration for full information on
pixel port modes and configuration settings.
Function
OP_CH_SEL[2:0]
000
001
010
011 (default)
100
101
110
111
Pixel Data and Synchronization Signals Control
The polarity of the LLC and synchronization signals can be inverted, and the LLC, the synchronization signals, and the pixel data output
can be tristated. Refer to the information on the following controls:
•
INV_F_POL
•
INV_VS_POL
•
INV_HS_POL
•
TRI_PIX
•
TRI_LLC
•
TRI_SYNCS
ADV7610 pixel port. Appendix C contains tables describing pixel port
Description
8-bit SDR ITU-656 mode
12-bit SDR ITU Mode 2
8-bit 4:2:2 DDR mode
12-bit DDR 4:2:2 Mode 2
24-bit 4:4:4 SDR mode
24-bit 4:4:4 DDR mode
16-bit ITU-656 SDR mode
24-bit ITU-656 SDR Mode 2
Description
P[23:16] Y/G, P[15:8] U/CrCb/B, P[7:0] V/R
P[23:16] Y/G, P[15:8] V/R, P[7:0] U/CrCb/B
P[23:16] U/CrCb/B, P[15:8] Y/G, P[7:0] V/R
P[23:16] V/R, P[15:8] Y/G, P[7:0] U/CrCb/B
P[23:16] U/CrCb/B, P[15:8] V/R, P[7:0]Y/G
P[23:16] V/R, P[15:8] U/CrCb/B, P[7:0] Y/G
Reserved
Reserved
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