Parallel Configuration Header; Adc Test Header; Table 8.8. J27 Header Pin Connections; Table 8.9. J26 Header Pin Connections - Lattice Semiconductor LIFCL-40-EVN User Manual

8.8. Parallel Configuration Header

The J27 header is used to access the SPI port of the CrossLink-NX.

Table 8.8. J27 Header Pin Connections

J27Pin Name
1
2
3
4
5
6
7
8
9
10
11
12
13
14

8.9. ADC Test Header

Table 8.9. J26 Header Pin Connections

J26 Pin Name
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
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FPGA-EB-02028-1.4
Signal Name
VCCIO2
VCCIO2
FMC_TCK
PS_POR_B
GND
GND
FMC_TDI
FMC_PRSNT
FMC_TDO
FMC_SCL
GND
GND
FMC_TMS
FMC_SDA
Signal Name
GND
GND
J24 PIN3
GND
J25 PIN3
GND
GND
GND
ADC_IN1P
GND
ADC_IN1N
GND
GND
GND
VREF2_CON
GND
GND
GND
VREF1_CON
GND
CrossLink-NX Evaluation Board
User Guide
LIFCL-40 Ball
—
—
P19
N19
—
—
P20
N20
P17
M20
—
—
P18
M19
LIFCL-40 Ball
—
—
—
—
—
—
—
—
T17
—
U17
—
—
—
—
—
—
—
—
—
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