Figure A.12. Power Decoupling - Lattice Semiconductor LIFCL-40-EVN User Manual

Crosslink-nx evaluation board
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CrossLink-NX Evaluation Board
User Guide
5
VCC_CORE_V1P0
VCC_CORE = 1.0 V
C113
C114
U3N
F12
VCC
J12
VCC
D
L12
VCC
N11
VCC
N9
VCC
F9
VCC
J9
VCC
L9
VCC
H9
VCCAUX
K12
VCCAUX
K9
VCCAUX
H12
VCCAUXA
N12
VCCAUXH3
N10
VCCAUXH4
N8
VCCAUXH5
LIFCL-40-BG400
C
V1P8_VCCAUX
C126
C127
U3M
B20
NC75
C20
NC76
A19
NC77
A18
NC78
B18
NC79
C18
NC80
B17
B
NC81
LIFCL-40-BG400
A
5
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42
4
C115
C116
C117
C118
C119
C120
C121
C122
J37
1
2
1
2
Header_2x1
V1P8_LDO
R137
C124
FB5
C125
0.1
MPZ1005S121CT000
1%
0603
J38
1
1
Header_2x1
R138
C128
C129
C130
C131
C132
C133
C134
0603
4

Figure A.12. Power Decoupling

3
U3O
VSS
VSS
VSS
C123
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
2
2
VSS
VSS
VSS
VSS
V1P8_LDO
VSS
VSS
FB6
VSS
0.1
MPZ1005S121CT000
VSS
1%
VSS
VSS
VSSADPHY
VSSADPHY
VSSADPHY
VSSADPHY
VSSADPHY
VSSADPHY
VSSADPHY
VSSSD3
VSSSD7
VSSSD2
VSSSD8
VSSSD12
VSSSD11
VSSSD10
VSSSD9
VSSSD1
VSSSD6
VSSSD4
VSSSD5
NC82
NC83
LIFCL-40-BG400
3
2
1
N18
J17
Y20
T19
G16
E14
M13
W16
G12
M12
F11
G11
H11
J11
K11
L11
M11
F10
G10
H10
J10
K10
L10
M10
G9
M9
T15
M8
E6
V13
H4
L4
P4
W3
U9
U8
Y1
C10
C8
C6
A5
C3
E1
A1
A20
D20
B19
C19
D19
A17
C17
B16
C15
A14
B12
A11
D18
C16
Lattice Semiconductor Applications
Lattice Semiconductor Applications
Lattice Semiconductor Applications
http://www.latticesemi.com/Support
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Title
Title
Title
Power Decoupling
Power Decoupling
Power Decoupling
Size
Size
Size
Project
Project
Project
B
B
B
CrossLink-NX Evaluation Board
CrossLink-NX Evaluation Board
CrossLink-NX Evaluation Board
Date:
Date:
Date:
Friday, Nov 22, 2019
Friday, Nov 22, 2019
Friday, Nov 22, 2019
2
1
FPGA-EB-02028-1.4
D
C
B
A
Schematic Rev
Schematic Rev
Schematic Rev
B-1
B-1
B-1
Board Rev
Board Rev
Board Rev
B
B
B
Sheet
Sheet
Sheet
12
12
12
of
of
of
14
14
14

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