Figure A.9. Configuration And Adc - Lattice Semiconductor LIFCL-40-EVN User Manual

Crosslink-nx evaluation board
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5
VCCIO0
U3A
VCCIO0
E15
VCCIO0
C74
C75
PT76A/MCLK/PCLKT0_0
PT78A/MCSN/PCLKT0_1
10uF
0.1uF
D
Bank0
PT82B/MCSNO/MSDO
3.3v
LIFCL-40-BG400
C
V3P3
L12
2
1
600ohm 500mA
C82
1uF
C84
0.1uF
J23
1
2
B
1
2
V1P8_VCCADC18
Header_2x1
V1P8_LDO
FB4
R94
MPZ1005S121CT000
0.1
1%
C85
C86
0603
10uF
0.1uF
A
5
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FPGA-EB-02028-1.4
4
VCCIO0
D11
INITN
PT74A/INITN
E11
PROGRAMN
PT74B/PROGRAMN
D12
DONE
PT76B/DONE
R78
E12
SPI_MCLK
E13
CSSPIN
33
D13
DQ0_MOSI
PT78B/MOSI/MD0
DQ1_MISO
D15
PT80A/MISO/MD1
D14
DQ2
PT80B/MD2
D16
DQ3
PT82A/MD3
E16
MCSNO
E18
PT84A
PMOD2_10 {8}
D17
PMOD2_9
{8}
PT84B
D18
Q1
2N2222/SOT23
V1P8_ADC_VREF
U7
4
6
IN
OUTF
3
5
R93
EN
OUTS
C83
2.2k
1
2
FILTER
GND
0.1uF
MAX6070BAUT18+T
1.8v
U3K
R15
N13
VCCADC18
ADC_REFP0
P14
ADC_REFP1
T16
ADC_DP0
R16
ADC_DN0
R14
T17
VSSADC
ADC_DP1
U17
C87
C88
ADC_DN1
LIFCL-40-BG400
1600pF
1600pF
DNI
R98
C89
C90
R99
1600pF
1600pF
DNI
Keep noisy signals away from ADC circuit
4

Figure A.9. Configuration and ADC

3
INITN indicator will light
R76
if an error occurs during
10k
configuration programming
SW5
PROGRAMN
PROGRAMN
R79
D17
2.0k
R
INITN
TP10
2
4
LED_RED_0603
INITN
DONE indicator will light when
configuration is successfully
VCCIO0
completed
R82
10k
R83
10k
1
DONE
DONE
TP12
CSSPIN
R88
DQ1_MISO
R89
DQ2
R91
VREF1_CON
J21
1
J21: 1-2 V1P8_ADC_VREF (Default)
2
2-3 J26 connector input
3
CON3
VREF2_CON
J22
1
J22: 1-2 V1P8_ADC_VREF (Default)
2
2-3 J26 connector input
3
CON3
10K POT
J24
1
R96
2
ADC_IN0
R95
100
3
1K
CON3
J24 1 = 10K POT
J24 2 = ADC_DN0
J24 3 = J26-3 Connector
J25
1
J25 1 = GROUND
2
J25 2 = ADC_DP0
3
J25 3 = J26-5 Connector
R97
CON3
To select POT, wire jumper:
100
J24-1 to J25-2
J24-2 to J25-1
J26
1
2
1
2
3
4
{10}
ADC_IN1P
3
4
5
6
{10}
ADC_IN1N
5
6
7
8
7
8
9
10
9
10
100
11
12
11
12
13
14
13
14
15
16
{10}
VREF2_CON
15
16
17
18
100
17
18
VREF1_CON
19
20
19
20
Header_2x10
3
CrossLink-NX Evaluation Board
2
PROGRAMN
{3}
Parallel / SPI Config Header
R77
J20
100
PROGRAMN
1
2
1
2
MCSNO
3
4
3
4
DQ0_MOSI
5
6
5
6
DQ1_MISO
7
8
7
8
1
R80
DQ3
9
10
9
10
3
100
DQ2
11
12
11
12
C76
13
14
13
14
10nF
Header_2x7
DNI
Place close to Flash
VCCIO0
VCCIO0
128 Mb SPI Flash
R86
R84
R85
1k
4.7k
4.7k
DNI
VCCIO0
0
U6
FLASH_CS
1
8
CS#
VCC
0
2
7
S0/SIO1
RESET#/SIO3
0
3
6
W#/SIO2
SCLK
4
5
GND
SI/SIO0
C79
20pF
MX25L12833FM2I-10G
DNI
C80
20pF
DNI
V1P8_VCCADC18
U8
A_IN0
2
PTD901-1015K-B103
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Title
Title
Title
Configuration and ADC
Configuration and ADC
Configuration and ADC
Size
Size
Size
Project
Project
Project
B
B
B
CrossLink-NX Evaluation Board
CrossLink-NX Evaluation Board
CrossLink-NX Evaluation Board
Date:
Date:
Date:
Monday, Jul 20, 2020
Monday, Jul 20, 2020
Monday, Jul 20, 2020
2
User Guide
1
FLASH_CS
DONE
VCCIO0
INITN
CSSPIN
SPI_MCLK
D
C78
R87
0.1uF
4.7k
C77
10nF
C
R90
0
DQ3
SPI_MCLK
R92
0
DQ0_MOSI
C81
20pF
DNI
B
A
Schematic Rev
Schematic Rev
Schematic Rev
B-1
B-1
B-1
Board Rev
Board Rev
Board Rev
B
B
B
Sheet
Sheet
Sheet
9
9
9
of
of
of
14
14
14
1
39

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