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CrossLink-NX Evaluation Board
User Guide
5
1
NC1
CN1
2
CLK_N
3
CLK_P
4
DGND1
5
DATA3_N
6
DATA3_P
D
7
DGND2
8
DATA1_N
9
DATA1_P
10
DGND3
11
DATA0_N
12
DATA0_P
13
DGND4
14
DATA2_N
15
DATA2_P
16
DGND5
17
DGND6
18
AF_VDD2V8
19
NC2
20
MCLK
21
SYNC
22
SDA
23
SCL
24
XCLR
25
DVDD1V2
26
DVDD1V8
27
DGND7
28
DGND8
29
AVDD2V8
30
C
DGND9
camconn_imx258_1x30
Keep LEDs away from Camera
B
CAM0_CLKP
A2
DPHY0_CKP
CAM0_CLKN
B1
DPHY0_CKN
CAM0_0P
B2
DPHY0_DP0
CAM0_0N
C1
DPHY0_DN0
CAM0_1P
A3
DPHY0_DP1
CAM0_1N
B3
DPHY0_DN1
CAM0_2P
C2
DPHY0_DP2
CAM0_2N
D1
DPHY0_DN2
CAM0_3P
A4
DPHY0_DP3
CAM0_3N
B4
DPHY0_DN3
A
5
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34
4
R23
100k
CAM0_CLKN
1
STDBY#
VDD
CAM0_CLKP
22
R24
OSCILLATOR
CAM0_3N
3
OUT
GND
CAM0_3P
ASE3-27.000MHz-K-T
CAM0_1N
CAM0_1P
CAM0_0N
VCCIO5
CAM0_0P
CAM0_2N
R25
R26
CAM0_2P
V2P8
4.7k
4.7k
CAM0_MCLK
CAM_SDA
CAM_SCL
V1P2
CAM_RESET
{10}
J3
1
2
1
2
Header_2x1
R32
C27
C28
0.1
1%
0.1uF
10uF
0603
J4
1
2
1
2
Header_2x1
U3I
D2
R33
VCCADPHY0
B5
VCCPLLDPHY0
C33
C34
0.1
C4
1%
VCCDPHY0
0.1uF
10uF
0603
J5
1
2
1
2
LIFCL-40-BG400
Header_2x1
R34
C35
C36
0.1
1%
0.1uF
10uF
0603
4
Figure A.4. Camera Interface (DPHYs)
3
V1P8
V2P8
X2
4
C20
C21
C18
0.1uF
2
1uF
0.1uF
CAM0_CLKN
CAM_SDA
{10}
R27
R28
CAM_SCL
{10}
100 ohm
100 ohm
DNI
DNI
CAM0_CLKP
V1P8
NOTE: Place close to FPGA
NOTE:
1. Match length within pair <= 0.1mm, match length between pairs <=1.0mm.
2. Differential impedance should be 100 ohms and 50 ohms as a single ended signal
3. All the power rails should be capable of carrying 1A current
V1P8_LDO
1
2
L5
220ohm 500mA
DPHY1_CKP
A8
DPHY1_CKP
DPHY1_CKN
B8
DPHY1_CKN
DPHY1_DP0
A7
DPHY1_DP0
DPHY1_DN0
B7
DPHY1_DN0
DPHY1_DP1
A9
DPHY1_DP1
DPHY1_DN1
B9
DPHY1_DN1
V1P0_LDO
DPHY1_DP2
A6
DPHY1_DP2
DPHY1_DN2
B6
DPHY1_DN2
1
2
DPHY1_DP3
A10
DPHY1_DP3
L7
DPHY1_DN3
B10
DPHY1_DN3
220ohm 500mA
V1P0_LDO
1
2
L9
220ohm 500mA
J6
1
2
1
2
DPHY1_CKP
3
4
3
4
5
6
5
6
DPHY1_DP0
7
8
7
8
9
10
9
10
DPHY1_DP1
11
12
11
12
13
14
13
14
DPHY1_DP2
15
16
15
16
17
18
17
18
DPHY1_DP3
19
20
19
20
Header_2x10
3
2
V1P2
V1P8
C22
C19
C23
C24
10uF
0.1uF
1uF
0.1uF
LVDS RX Termination Resistors
CAM0_0N
CAM0_1N
CAM0_2N
R29
R30
100 ohm
100 ohm
DNI
DNI
CAM0_0P
CAM0_1P
CAM0_2P
1
C25
C26
220ohm 500mA
0.1uF
10uF
U3J
C7
VCCADPHY1
C9
1
VCCPLLDPHY1
C29
C30
220ohm 500mA
C5
VCCDPHY1
0.1uF
10uF
1
LIFCL-40-BG400
C31
C32
220ohm 500mA
0.1uF
10uF
DPHY1_CKN
DPHY1_DN0
DPHY1_DN1
Lattice Semiconductor Applications
Lattice Semiconductor Applications
Lattice Semiconductor Applications
DPHY1_DN2
http://www.latticesemi.com/Support
http://www.latticesemi.com/Support
http://www.latticesemi.com/Support
DPHY1_DN3
Title
Title
Title
Camera Interface (DPHYs)
Camera Interface (DPHYs)
Camera Interface (DPHYs)
Size
Size
Size
Project
Project
Project
B
B
B
CrossLink-NX Evaluation Board
CrossLink-NX Evaluation Board
CrossLink-NX Evaluation Board
Date:
Date:
Date:
Friday, Nov 22, 2019
Friday, Nov 22, 2019
Friday, Nov 22, 2019
2
1
D
CAM0_3N
R31
100 ohm
DNI
CAM0_3P
C
V1P8_LDO
2
L4
V1P0_LDO
2
L6
B
2
L8
A
Schematic Rev
Schematic Rev
Schematic Rev
B-1
B-1
B-1
Board Rev
Board Rev
Board Rev
B
B
B
Sheet
Sheet
Sheet
4
4
4
of
of
of
14
14
14
1
FPGA-EB-02028-1.4
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