Lattice Semiconductor LIFCL-40-EVN User Manual page 4

CrossLink-NX Evaluation Board
User Guide
Figures
Figure 1.1. Top View of CrossLink-NX Evaluation Board ....................................................................................................... 7
Figure 1.2. Bottom View of CrossLink-NX Evaluation Board ................................................................................................. 8
Figure 1.3. Silkscreen of CrossLink-NX Evaluation Board (Top ............................................................................................. 9
Figure 1.4. Silkscreen of CrossLink-NX Evaluation Board (Bottom) .................................................................................... 10
Figure 2.1. Top View of CrossLink-NX Evaluation Board - Jumper Locations ..................................................................... 12
Figure 3.1. Board Power Scheme ........................................................................................................................................ 14
Figure 4.1. Configuration and I
Figure 4.2. SPI Flash Operation Dialog ................................................................................................................................ 16
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Figure 6.1. I C Architecture and UART Options .................................................................................................................. 19
Figure A.1. Title Page .......................................................................................................................................................... 31
Figure A.2. Block Diagram ................................................................................................................................................... 32
Figure A.3. USB Interface .................................................................................................................................................... 33
Figure A.4. Camera Interface (DPHYs) ................................................................................................................................ 34
Figure A.5. Raspberry Pi and User I/O Interface ................................................................................................................. 35
Figure A.6. SERDES SMAs/Switches/FMC Control .............................................................................................................. 36
Figure A.7. I2C LEDs and Push Buttons ............................................................................................................................... 37
Figure A.8. PMODs .............................................................................................................................................................. 38
Figure A.9. Configuration and ADC ..................................................................................................................................... 39
Figure A.10. FMC-LPC .......................................................................................................................................................... 40
Figure A.11. Power CSI and Banks ...................................................................................................................................... 41
Figure A.12. Power Decoupling ........................................................................................................................................... 42
Figure A.13. Power Regulators ........................................................................................................................................... 43
Figure A.14. Power Block Diagram ...................................................................................................................................... 44
Tables
Table 2.1. Jumper Table ...................................................................................................................................................... 13
Table 3.1. CrossLink-NX VCCIO Supply Options .................................................................................................................. 14
Table 4.1. JTAG Connections ............................................................................................................................................... 15
Table 4.2. Other JTAG Signals ............................................................................................................................................. 17
Table 5.1. Clock Sources ..................................................................................................................................................... 18
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Table 6.1. I C Global Bus Connections ................................................................................................................................ 19
Table 6.2. CrossLink-NX SPI Connections ............................................................................................................................ 20
Table 7.1. Eight-Position DIP Switch Signals ....................................................................................................................... 21
Table 7.2. Push Button Switch Signals ................................................................................................................................ 21
Table 7.3. General Purpose LED Signals .............................................................................................................................. 22
Table 7.4. Various LED Signals ............................................................................................................................................ 22
Table 8.1. FMC LPC Header Pin Connections ...................................................................................................................... 23
Table 8.2. Parallel FMC Configuration J27 Pin Connections ............................................................................................... 25
Table 8.3. Raspberry Pi JP8 Header Pin Connections .......................................................................................................... 25
Table 8.4. Camera CN1 Connector Pin Connections ........................................................................................................... 26
Table 8.5. D-PHY1 J6 Header Pin Connections .................................................................................................................... 27
Table 8.6. J17, J18 and J19 Header Pin Connections .......................................................................................................... 28
Table 8.7. J1 Header Pin Connections ................................................................................................................................. 28
Table 8.8. J27 Header Pin Connections ............................................................................................................................... 29
Table 8.9. J26 Header Pin Connections ............................................................................................................................... 29
Table 11.1. Ordering Information ....................................................................................................................................... 30
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C Architecture ................................................................................................................... 15
FPGA-EB-02028-1.4