Subsystems; Clock Sources; Expansion Header Landings; Table 7.1. Breakout Board Components And Interfaces - Lattice Semiconductor MachXO2280 Breakout Board User Manual

MachXO 2280 Breakout Board Evaluation Kit
Evaluation Board User Guide

Table 7.1. Breakout Board Components and Interfaces

Component/Interface Type
Circuits
USB Controller Circuit
USB Mini-B Socket I/O
Components
LCMXO2280C PLD
Interfaces
LED Array Output
Eight 2x20 Header I/O
Landings
1x8 Header Landing I/O
4-Hole Prototype Area —

7.2. Subsystems

This section describes the principle sub systems for the Breakout Board in alphabetical order.

7.2.1. Clock Sources

All clocks for the counter demonstration designs originate from the MachXO 2280 PLD on-chip oscillator. You may use
an expansion header landing to drive a PLD input with an external clock source.

7.2.2. Expansion Header Landings

The expansion header landings provide access to user GPIO, primary inputs, clocks, and VCCO pins of the MachXO
2280. The remaining pins serve as power supplies for external connections. Each landing is configured as one 2 × 20
100 mil.

Table 7.2. Expansion Connector Reference

Item
Reference Designators
Part Number
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14
Schematic Reference
U2: FT2232H
J1:USB_MINI_B
U4: LCMXO2280C-3FTN256C
D8-D1
J3: header_2x20
J4: header_2x20
J5: header_2x20
J6: header_2x20
J7: header_2x20
J8: header_2x20
J9: header_2x20
J10: header_2x20
J1: header_1x8
—
Description
J3, J4, J5, J6, J7, J8, J9, J10
header_2x20
Description
USB-to-JTAG interface and dual USB UART/FIFO
IC
Programming and debug interface
2280-LUT device packaged in a 17 x 17mm,
256-ball ftBGA.
Red LEDs
User-definable I/O
Optional JTAG interface
Prototype area 100mil centered holes.
FPGA-EB-02038-1.2