Spi Topology; Spi Configuration; Table 6.2. Crosslink-Nx Spi Connections - Lattice Semiconductor LIFCL-40-EVN User Manual

Crosslink-nx evaluation board
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CrossLink-NX Evaluation Board
User Guide

6.3. SPI Topology

SPI Configuration

One of the major functions of SPI connections on the board is to support CrossLink-NX configuration from the SPI Flash
or the Parallel Configuration Header. The CrossLink-NX Evaluation Board can support both Master SPI (MSPI) and Slave
SPI (SSPI) modes for CrossLink-NX configuration.

Table 6.2. CrossLink-NX SPI Connections

Signal Name
SPI_MCLK
DQ0_MOSI
DQ1_MISO
CSSPIN
DQ2
DQ3
MCSNO
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All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
20
CrossLink-NX Ball
E12
D13
D15
E13
D14
D16
E16
Parallel Configuration Header Pin
12
5
7
8
11
9
3
FPGA-EB-02028-1.4

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