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CrossLink-NX Evaluation Board
User Guide
Appendix C. Fast Configuration Issues
Early versions of the Evaluation Board were assembled with LIFCL-40-9BG400CES (ES suffix, Engineering Sample)
devices. With -ES silicon, an Early I/O Release enabled bitstream is not compatible with the direct SRAM configuration
Fast Configuration operation in Lattice Radiant Programmer. If attempted, the configuration operation will fail, since
the board has Early I/O bitstream burned in onboard flash. Erasing flash and power cycling the board is suggested
before executing Fast Configuration. Otherwise, you should select the SRAM Erase, Program, Verify operation in Lattice
Radiant Programmer.
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All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02028-1.4
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