Xilinx KC705 User Manual page 79

NET FMC_HPC_LA20_N
NET FMC_HPC_LA28_P
NET FMC_HPC_LA28_N
NET FMC_HPC_LA19_P
NET FMC_HPC_LA19_N
NET FMC_HPC_LA29_P
NET FMC_HPC_LA29_N
NET FMC_HPC_LA25_P
NET FMC_HPC_LA25_N
NET FMC_HPC_LA22_P
NET FMC_HPC_LA22_N
NET FMC_HPC_LA24_P
NET FMC_HPC_LA24_N
NET FMC_HPC_LA21_P
NET FMC_HPC_LA21_N
NET FMC_HPC_LA26_P
NET FMC_HPC_LA26_N
NET FMC_HPC_LA23_P
NET FMC_HPC_LA23_N
NET FMC_HPC_LA27_P
NET FMC_HPC_LA27_N
NET GPIO_LED_6_LS
NET GPIO_SW_C
NET FMC_HPC_HA13_P
NET FMC_HPC_HA13_N
NET FMC_HPC_HA16_P
NET FMC_HPC_HA16_N
NET FMC_HPC_HA23_P
NET FMC_HPC_HA23_N
NET FMC_HPC_HA20_P
NET FMC_HPC_HA20_N
NET FMC_HPC_HA18_P
NET FMC_HPC_HA18_N
NET FMC_HPC_HA22_P
NET FMC_HPC_HA22_N
NET FMC_HPC_HA15_P
NET FMC_HPC_HA15_N
NET FMC_HPC_HA21_P
NET FMC_HPC_HA21_N
NET FMC_HPC_HA14_P
NET FMC_HPC_HA14_N
NET FMC_HPC_HA19_P
NET FMC_HPC_HA19_N
NET FMC_HPC_HA01_CC_P
NET FMC_HPC_HA01_CC_N
NET FMC_HPC_HA17_CC_P
NET FMC_HPC_HA17_CC_N
NET FMC_HPC_HA00_CC_P
NET FMC_HPC_HA00_CC_N
NET FMC_HPC_HA09_P
NET FMC_HPC_HA09_N
NET FMC_HPC_HA03_P
NET FMC_HPC_HA03_N
NET FMC_HPC_HA04_P
NET FMC_HPC_HA04_N
NET FMC_HPC_HA10_P
NET FMC_HPC_HA10_N
NET FMC_HPC_HA02_P
NET FMC_HPC_HA02_N
NET FMC_HPC_HA05_P
NET FMC_HPC_HA05_N
NET FMC_HPC_HA08_P
NET FMC_HPC_HA08_N
NET FMC_HPC_HA06_P
NET FMC_HPC_HA06_N
NET FMC_HPC_HA11_P
NET FMC_HPC_HA11_N
NET FMC_HPC_HA12_P
NET FMC_HPC_HA12_N
NET FMC_HPC_HA07_P
NET FMC_HPC_HA07_N
NET GPIO_LED_7_LS
NET PMBUS_DATA_LS
NET DDR3_D24
NET DDR3_D31
NET DDR3_D26
NET DDR3_D30
NET DDR3_DQS3_P
NET DDR3_DQS3_N
NET DDR3_D27
NET DDR3_D29
KC705 Evaluation Board
UG810 (v1.3) May 10, 2013
LOC = D19 | IOSTANDARD=LVCMOS25; # Bank
LOC = D16 | IOSTANDARD=LVCMOS25; # Bank
LOC = C16 | IOSTANDARD=LVCMOS25; # Bank
LOC = G18 | IOSTANDARD=LVCMOS25; # Bank
LOC = F18 | IOSTANDARD=LVCMOS25; # Bank
LOC = C17 | IOSTANDARD=LVCMOS25; # Bank
LOC = B17 | IOSTANDARD=LVCMOS25; # Bank
LOC = G17 | IOSTANDARD=LVCMOS25; # Bank
LOC = F17 | IOSTANDARD=LVCMOS25; # Bank
LOC = C20 | IOSTANDARD=LVCMOS25; # Bank
LOC = B20 | IOSTANDARD=LVCMOS25; # Bank
LOC = A16 | IOSTANDARD=LVCMOS25; # Bank
LOC = A17 | IOSTANDARD=LVCMOS25; # Bank
LOC = A20 | IOSTANDARD=LVCMOS25; # Bank
LOC = A21 | IOSTANDARD=LVCMOS25; # Bank
LOC = B18 | IOSTANDARD=LVCMOS25; # Bank
LOC = A18 | IOSTANDARD=LVCMOS25; # Bank
LOC = B22 | IOSTANDARD=LVCMOS25; # Bank
LOC = A22 | IOSTANDARD=LVCMOS25; # Bank
LOC = C19 | IOSTANDARD=LVCMOS25; # Bank
LOC = B19 | IOSTANDARD=LVCMOS25; # Bank
LOC = E18 | IOSTANDARD=LVCMOS25; # Bank
LOC = G12 | IOSTANDARD=LVCMOS25; # Bank
LOC = L16 | IOSTANDARD=LVCMOS25; # Bank
LOC = K16 | IOSTANDARD=LVCMOS25; # Bank
LOC = L15 | IOSTANDARD=LVCMOS25; # Bank
LOC = K15 | IOSTANDARD=LVCMOS25; # Bank
LOC = L12 | IOSTANDARD=LVCMOS25; # Bank
LOC = L13 | IOSTANDARD=LVCMOS25; # Bank
LOC = K13 | IOSTANDARD=LVCMOS25; # Bank
LOC = J13 | IOSTANDARD=LVCMOS25; # Bank
LOC = K14 | IOSTANDARD=LVCMOS25; # Bank
LOC = J14 | IOSTANDARD=LVCMOS25; # Bank
LOC = L11 | IOSTANDARD=LVCMOS25; # Bank
LOC = K11 | IOSTANDARD=LVCMOS25; # Bank
LOC = H15 | IOSTANDARD=LVCMOS25; # Bank
LOC = G15 | IOSTANDARD=LVCMOS25; # Bank
LOC = J11 | IOSTANDARD=LVCMOS25; # Bank
LOC = J12 | IOSTANDARD=LVCMOS25; # Bank
LOC = J16 | IOSTANDARD=LVCMOS25; # Bank
LOC = H16 | IOSTANDARD=LVCMOS25; # Bank
LOC = H11 | IOSTANDARD=LVCMOS25; # Bank
LOC = H12 | IOSTANDARD=LVCMOS25; # Bank
LOC = H14 | IOSTANDARD=LVCMOS25; # Bank
LOC = G14 | IOSTANDARD=LVCMOS25; # Bank
LOC = G13 | IOSTANDARD=LVCMOS25; # Bank
LOC = F13 | IOSTANDARD=LVCMOS25; # Bank
LOC = D12 | IOSTANDARD=LVCMOS25; # Bank
LOC = D13 | IOSTANDARD=LVCMOS25; # Bank
LOC = F12 | IOSTANDARD=LVCMOS25; # Bank
LOC = E13 | IOSTANDARD=LVCMOS25; # Bank
LOC = C12 | IOSTANDARD=LVCMOS25; # Bank
LOC = B12 | IOSTANDARD=LVCMOS25; # Bank
LOC = F11 | IOSTANDARD=LVCMOS25; # Bank
LOC = E11 | IOSTANDARD=LVCMOS25; # Bank
LOC = A11 | IOSTANDARD=LVCMOS25; # Bank
LOC = A12 | IOSTANDARD=LVCMOS25; # Bank
LOC = D11 | IOSTANDARD=LVCMOS25; # Bank
LOC = C11 | IOSTANDARD=LVCMOS25; # Bank
LOC = F15 | IOSTANDARD=LVCMOS25; # Bank
LOC = E16 | IOSTANDARD=LVCMOS25; # Bank
LOC = E14 | IOSTANDARD=LVCMOS25; # Bank
LOC = E15 | IOSTANDARD=LVCMOS25; # Bank
LOC = D14 | IOSTANDARD=LVCMOS25; # Bank
LOC = C14 | IOSTANDARD=LVCMOS25; # Bank
LOC = B13 | IOSTANDARD=LVCMOS25; # Bank
LOC = A13 | IOSTANDARD=LVCMOS25; # Bank
LOC = C15 | IOSTANDARD=LVCMOS25; # Bank
LOC = B15 | IOSTANDARD=LVCMOS25; # Bank
LOC = B14 | IOSTANDARD=LVCMOS25; # Bank
LOC = A15 | IOSTANDARD=LVCMOS25; # Bank
LOC = F16 | IOSTANDARD=LVCMOS25; # Bank
LOC = Y14 | IOSTANDARD=LVCMOS15; # Bank
LOC = AK16 | IOSTANDARD=SSTL15; # Bank
LOC = AK15 | IOSTANDARD=SSTL15; # Bank
LOC = AG15 | IOSTANDARD=SSTL15; # Bank
LOC = AH15 | IOSTANDARD=SSTL15; # Bank
LOC = AH16 | IOSTANDARD=SSTL15; # Bank
LOC = AJ16 | IOSTANDARD=SSTL15; # Bank
LOC = AF15 | IOSTANDARD=SSTL15; # Bank
LOC = AG14 | IOSTANDARD=SSTL15; # Bank
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KC705 Board UCF Listing
17 VCCO - VADJ_FPGA - IO_L14N_T2_SRCC_17
17 VCCO - VADJ_FPGA - IO_L15P_T2_DQS_17
17 VCCO - VADJ_FPGA - IO_L15N_T2_DQS_17
17 VCCO - VADJ_FPGA - IO_L16P_T2_17
17 VCCO - VADJ_FPGA - IO_L16N_T2_17
17 VCCO - VADJ_FPGA - IO_L17P_T2_17
17 VCCO - VADJ_FPGA - IO_L17N_T2_17
17 VCCO - VADJ_FPGA - IO_L18P_T2_17
17 VCCO - VADJ_FPGA - IO_L18N_T2_17
17 VCCO - VADJ_FPGA - IO_L19P_T3_17
17 VCCO - VADJ_FPGA - IO_L19N_T3_VREF_17
17 VCCO - VADJ_FPGA - IO_L20P_T3_17
17 VCCO - VADJ_FPGA - IO_L20N_T3_17
17 VCCO - VADJ_FPGA - IO_L21P_T3_DQS_17
17 VCCO - VADJ_FPGA - IO_L21N_T3_DQS_17
17 VCCO - VADJ_FPGA - IO_L22P_T3_17
17 VCCO - VADJ_FPGA - IO_L22N_T3_17
17 VCCO - VADJ_FPGA - IO_L23P_T3_17
17 VCCO - VADJ_FPGA - IO_L23N_T3_17
17 VCCO - VADJ_FPGA - IO_L24P_T3_17
17 VCCO - VADJ_FPGA - IO_L24N_T3_17
17 VCCO - VADJ_FPGA - IO_25_17
18 VCCO - VADJ_FPGA - IO_0_18
18 VCCO - VADJ_FPGA - IO_L1P_T0_18
18 VCCO - VADJ_FPGA - IO_L1N_T0_18
18 VCCO - VADJ_FPGA - IO_L2P_T0_18
18 VCCO - VADJ_FPGA - IO_L2N_T0_18
18 VCCO - VADJ_FPGA - IO_L3P_T0_DQS_18
18 VCCO - VADJ_FPGA - IO_L3N_T0_DQS_18
18 VCCO - VADJ_FPGA - IO_L4P_T0_18
18 VCCO - VADJ_FPGA - IO_L4N_T0_18
18 VCCO - VADJ_FPGA - IO_L5P_T0_18
18 VCCO - VADJ_FPGA - IO_L5N_T0_18
18 VCCO - VADJ_FPGA - IO_L6P_T0_18
18 VCCO - VADJ_FPGA - IO_L6N_T0_VREF_18
18 VCCO - VADJ_FPGA - IO_L7P_T1_18
18 VCCO - VADJ_FPGA - IO_L7N_T1_18
18 VCCO - VADJ_FPGA - IO_L8P_T1_18
18 VCCO - VADJ_FPGA - IO_L8N_T1_18
18 VCCO - VADJ_FPGA - IO_L9P_T1_DQS_18
18 VCCO - VADJ_FPGA - IO_L9N_T1_DQS_18
18 VCCO - VADJ_FPGA - IO_L10P_T1_18
18 VCCO - VADJ_FPGA - IO_L10N_T1_18
18 VCCO - VADJ_FPGA - IO_L11P_T1_SRCC_18
18 VCCO - VADJ_FPGA - IO_L11N_T1_SRCC_18
18 VCCO - VADJ_FPGA - IO_L12P_T1_MRCC_18
18 VCCO - VADJ_FPGA - IO_L12N_T1_MRCC_18
18 VCCO - VADJ_FPGA - IO_L13P_T2_MRCC_18
18 VCCO - VADJ_FPGA - IO_L13N_T2_MRCC_18
18 VCCO - VADJ_FPGA - IO_L14P_T2_SRCC_18
18 VCCO - VADJ_FPGA - IO_L14N_T2_SRCC_18
18 VCCO - VADJ_FPGA - IO_L15P_T2_DQS_18
18 VCCO - VADJ_FPGA - IO_L15N_T2_DQS_18
18 VCCO - VADJ_FPGA - IO_L16P_T2_18
18 VCCO - VADJ_FPGA - IO_L16N_T2_18
18 VCCO - VADJ_FPGA - IO_L17P_T2_18
18 VCCO - VADJ_FPGA - IO_L17N_T2_18
18 VCCO - VADJ_FPGA - IO_L18P_T2_18
18 VCCO - VADJ_FPGA - IO_L18N_T2_18
18 VCCO - VADJ_FPGA - IO_L19P_T3_18
18 VCCO - VADJ_FPGA - IO_L19N_T3_VREF_18
18 VCCO - VADJ_FPGA - IO_L20P_T3_18
18 VCCO - VADJ_FPGA - IO_L20N_T3_18
18 VCCO - VADJ_FPGA - IO_L21P_T3_DQS_18
18 VCCO - VADJ_FPGA - IO_L21N_T3_DQS_18
18 VCCO - VADJ_FPGA - IO_L22P_T3_18
18 VCCO - VADJ_FPGA - IO_L22N_T3_18
18 VCCO - VADJ_FPGA - IO_L23P_T3_18
18 VCCO - VADJ_FPGA - IO_L23N_T3_18
18 VCCO - VADJ_FPGA - IO_L24P_T3_18
18 VCCO - VADJ_FPGA - IO_L24N_T3_18
18 VCCO - VADJ_FPGA - IO_25_18
32 VCCO - VCC1V5_FPGA - IO_0_VRN_32
32 VCCO - VCC1V5_FPGA - IO_L1P_T0_32
32 VCCO - VCC1V5_FPGA - IO_L1N_T0_32
32 VCCO - VCC1V5_FPGA - IO_L2P_T0_32
32 VCCO - VCC1V5_FPGA - IO_L2N_T0_32
32 VCCO - VCC1V5_FPGA - IO_L3P_T0_DQS_32
32 VCCO - VCC1V5_FPGA - IO_L3N_T0_DQS_32
32 VCCO - VCC1V5_FPGA - IO_L4P_T0_32
32 VCCO - VCC1V5_FPGA - IO_L4N_T0_32
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