Xilinx KC705 User Manual page 81

NET DDR3_A5
NET DDR3_A4
NET DDR3_A3
NET DDR3_A2
NET DDR3_A1
NET DDR3_A0
NET VRP_33
NET GPIO_SW_W
NET DDR3_D63
NET DDR3_D57
NET DDR3_D62
NET DDR3_D56
NET DDR3_DQS7_P
NET DDR3_DQS7_N
NET DDR3_D59
NET DDR3_D58
NET DDR3_D61
NET DDR3_D60
NET DDR3_DM7
NET VTTVREF
NET DDR3_D52
NET DDR3_D49
NET DDR3_D54
NET DDR3_D48
NET DDR3_DQS6_P
NET DDR3_DQS6_N
NET DDR3_D50
NET DDR3_D51
NET DDR3_D55
NET DDR3_D53
NET DDR3_DM6
NET GPIO_SW_E
NET DDR3_D44
NET DDR3_D45
NET DDR3_D41
NET DDR3_D40
NET DDR3_DQS5_P
NET DDR3_DQS5_N
NET DDR3_D43
NET DDR3_D42
NET DDR3_D47
NET DDR3_D46
NET DDR3_DM5
NET DDR3_RESET_B
NET DDR3_D36
NET VTTVREF
NET DDR3_D35
NET DDR3_D34
NET DDR3_DQS4_P
NET DDR3_DQS4_N
NET DDR3_D39
NET DDR3_D33
NET DDR3_D38
NET DDR3_D32
NET DDR3_DM4
NET DDR3_D37
NET CPU_RESET
NET PCIE_TX4_P
NET PCIE_RX4_P
NET PCIE_TX4_N
NET PCIE_RX4_N
NET PCIE_TX5_P
NET PCIE_RX5_P
NET PCIE_TX5_N
NET PCIE_RX5_N
NET PCIE_CLK_QO_N
NET PCIE_CLK_QO_P
NET PCIE_TX6_P
NET PCIE_RX6_P
NET PCIE_TX6_N
NET PCIE_RX6_N
NET PCIE_TX7_P
NET PCIE_RX7_P
NET PCIE_TX7_N
NET PCIE_RX7_N
NET PCIE_TX0_P
NET PCIE_RX0_P
NET PCIE_TX0_N
NET PCIE_RX0_N
NET PCIE_TX1_P
NET PCIE_RX1_P
KC705 Evaluation Board
UG810 (v1.3) May 10, 2013
LOC = AJ13 | IOSTANDARD=SSTL15; # Bank
LOC = AJ12 | IOSTANDARD=SSTL15; # Bank
LOC = AF12 | IOSTANDARD=SSTL15; # Bank
LOC = AG12 | IOSTANDARD=SSTL15; # Bank
LOC = AG13 | IOSTANDARD=SSTL15; # Bank
LOC = AH12 | IOSTANDARD=SSTL15; # Bank
LOC = AD13 |
LOC = AC6 | IOSTANDARD=LVCMOS15; # Bank
LOC = AD4 | IOSTANDARD=SSTL15; # Bank
LOC = AD3 | IOSTANDARD=SSTL15; # Bank
LOC = AC2 | IOSTANDARD=SSTL15; # Bank
LOC = AC1 | IOSTANDARD=SSTL15; # Bank
LOC = AD2 | IOSTANDARD=DIFF_SSTL15; # Bank
LOC = AD1 | IOSTANDARD=DIFF_SSTL15; # Bank
LOC = AC5 | IOSTANDARD=SSTL15; # Bank
LOC = AC4 | IOSTANDARD=SSTL15; # Bank
LOC = AD6 | IOSTANDARD=SSTL15; # Bank
LOC = AE6 | IOSTANDARD=SSTL15; # Bank
LOC = AC7 | IOSTANDARD=SSTL15; # Bank
LOC = AD7 |
LOC = AF3 | IOSTANDARD=SSTL15; # Bank
LOC = AF2 | IOSTANDARD=SSTL15; # Bank
LOC = AE1 | IOSTANDARD=SSTL15; # Bank
LOC = AF1 | IOSTANDARD=SSTL15; # Bank
LOC = AG4 | IOSTANDARD=DIFF_SSTL15; # Bank
LOC = AG3 | IOSTANDARD=DIFF_SSTL15; # Bank
LOC = AE4 | IOSTANDARD=SSTL15; # Bank
LOC = AE3 | IOSTANDARD=SSTL15; # Bank
LOC = AE5 | IOSTANDARD=SSTL15; # Bank
LOC = AF5 | IOSTANDARD=SSTL15; # Bank
LOC = AF6 | IOSTANDARD=SSTL15; # Bank
LOC = AG5 | IOSTANDARD=LVCMOS15; # Bank
LOC = AH4 | IOSTANDARD=SSTL15; # Bank
LOC = AJ4 | IOSTANDARD=SSTL15; # Bank
LOC = AH6 | IOSTANDARD=SSTL15; # Bank
LOC = AH5 | IOSTANDARD=SSTL15; # Bank
LOC = AG2 | IOSTANDARD=DIFF_SSTL15; # Bank
LOC = AH1 | IOSTANDARD=DIFF_SSTL15; # Bank
LOC = AH2 | IOSTANDARD=SSTL15; # Bank
LOC = AJ2 | IOSTANDARD=SSTL15; # Bank
LOC = AJ1 | IOSTANDARD=SSTL15; # Bank
LOC = AK1 | IOSTANDARD=SSTL15; # Bank
LOC = AJ3 | IOSTANDARD=SSTL15; # Bank
LOC = AK3 | IOSTANDARD=LVCMOS15; # Bank
LOC = AF8 | IOSTANDARD=SSTL15; # Bank
LOC = AG8 |
LOC = AF7 | IOSTANDARD=SSTL15; # Bank
LOC = AG7 | IOSTANDARD=SSTL15; # Bank
LOC = AH7 | IOSTANDARD=DIFF_SSTL15; # Bank
LOC = AJ7 | IOSTANDARD=DIFF_SSTL15; # Bank
LOC = AJ6 | IOSTANDARD=SSTL15; # Bank
LOC = AK6 | IOSTANDARD=SSTL15; # Bank
LOC = AJ8 | IOSTANDARD=SSTL15; # Bank
LOC = AK8 | IOSTANDARD=SSTL15; # Bank
LOC = AK5 | IOSTANDARD=SSTL15; # Bank
LOC = AK4 | IOSTANDARD=SSTL15; # Bank
LOC = AB7 | IOSTANDARD=LVCMOS15; # Bank
LOC = T2
LOC = V6
LOC = T1
LOC = V5
LOC = U4
LOC = W4
LOC = U3
LOC = W3
LOC = U7
LOC = U8
LOC = V2
LOC = Y6
LOC = V1
LOC = Y5
LOC = Y2
LOC = AA4
LOC = Y1
LOC = AA3
LOC = L4
LOC = M6
LOC = L3
LOC = M5
LOC = M2
LOC = P6
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33 VCCO - VCC1V5_FPGA - IO_L22P_T3_33
33 VCCO - VCC1V5_FPGA - IO_L22N_T3_33
33 VCCO - VCC1V5_FPGA - IO_L23P_T3_33
33 VCCO - VCC1V5_FPGA - IO_L23N_T3_33
33 VCCO - VCC1V5_FPGA - IO_L24P_T3_33
33 VCCO - VCC1V5_FPGA - IO_L24N_T3_33
; # Bank 33 VCCO - VCC1V5_FPGA - IO_25_VRP_33
34 VCCO - VCC1V5_FPGA - IO_0_VRN_34
34 VCCO - VCC1V5_FPGA - IO_L1P_T0_34
34 VCCO - VCC1V5_FPGA - IO_L1N_T0_34
34 VCCO - VCC1V5_FPGA - IO_L2P_T0_34
34 VCCO - VCC1V5_FPGA - IO_L2N_T0_34
34 VCCO - VCC1V5_FPGA - IO_L3P_T0_DQS_34
34 VCCO - VCC1V5_FPGA - IO_L3N_T0_DQS_34
34 VCCO - VCC1V5_FPGA - IO_L4P_T0_34
34 VCCO - VCC1V5_FPGA - IO_L4N_T0_34
34 VCCO - VCC1V5_FPGA - IO_L5P_T0_34
34 VCCO - VCC1V5_FPGA - IO_L5N_T0_34
34 VCCO - VCC1V5_FPGA - IO_L6P_T0_34
; # Bank 34 VCCO - VCC1V5_FPGA - IO_L6N_T0_VREF_34
34 VCCO - VCC1V5_FPGA - IO_L7P_T1_34
34 VCCO - VCC1V5_FPGA - IO_L7N_T1_34
34 VCCO - VCC1V5_FPGA - IO_L8P_T1_34
34 VCCO - VCC1V5_FPGA - IO_L8N_T1_34
34 VCCO - VCC1V5_FPGA - IO_L9P_T1_DQS_34
34 VCCO - VCC1V5_FPGA - IO_L9N_T1_DQS_34
34 VCCO - VCC1V5_FPGA - IO_L10P_T1_34
34 VCCO - VCC1V5_FPGA - IO_L10N_T1_34
34 VCCO - VCC1V5_FPGA - IO_L11P_T1_SRCC_34
34 VCCO - VCC1V5_FPGA - IO_L11N_T1_SRCC_34
34 VCCO - VCC1V5_FPGA - IO_L12P_T1_MRCC_34
34 VCCO - VCC1V5_FPGA - IO_L12N_T1_MRCC_34
34 VCCO - VCC1V5_FPGA - IO_L13P_T2_MRCC_34
34 VCCO - VCC1V5_FPGA - IO_L13N_T2_MRCC_34
34 VCCO - VCC1V5_FPGA - IO_L14P_T2_SRCC_34
34 VCCO - VCC1V5_FPGA - IO_L14N_T2_SRCC_34
34 VCCO - VCC1V5_FPGA - IO_L15P_T2_DQS_34
34 VCCO - VCC1V5_FPGA - IO_L15N_T2_DQS_34
34 VCCO - VCC1V5_FPGA - IO_L16P_T2_34
34 VCCO - VCC1V5_FPGA - IO_L16N_T2_34
34 VCCO - VCC1V5_FPGA - IO_L17P_T2_34
34 VCCO - VCC1V5_FPGA - IO_L17N_T2_34
34 VCCO - VCC1V5_FPGA - IO_L18P_T2_34
34 VCCO - VCC1V5_FPGA - IO_L18N_T2_34
34 VCCO - VCC1V5_FPGA - IO_L19P_T3_34
; # Bank 34 VCCO - VCC1V5_FPGA - IO_L19N_T3_VREF_34
34 VCCO - VCC1V5_FPGA - IO_L20P_T3_34
34 VCCO - VCC1V5_FPGA - IO_L20N_T3_34
34 VCCO - VCC1V5_FPGA - IO_L21P_T3_DQS_34
34 VCCO - VCC1V5_FPGA - IO_L21N_T3_DQS_34
34 VCCO - VCC1V5_FPGA - IO_L22P_T3_34
34 VCCO - VCC1V5_FPGA - IO_L22N_T3_34
34 VCCO - VCC1V5_FPGA - IO_L23P_T3_34
34 VCCO - VCC1V5_FPGA - IO_L23N_T3_34
34 VCCO - VCC1V5_FPGA - IO_L24P_T3_34
34 VCCO - VCC1V5_FPGA - IO_L24N_T3_34
34 VCCO - VCC1V5_FPGA - IO_25_VRP_34
; # Bank 115
; # Bank 115
; # Bank 115
; # Bank 115
; # Bank 115
; # Bank 115
; # Bank 115
; # Bank 115
; # Bank 115
; # Bank 115
; # Bank 115
; # Bank 115
; # Bank 115
; # Bank 115
; # Bank 115
; # Bank 115
; # Bank 115
; # Bank 115
; # Bank 116
; # Bank 116
; # Bank 116
; # Bank 116
; # Bank 116
; # Bank 116
KC705 Board UCF Listing
- MGTXTXP3_115
- MGTXRXP3_115
- MGTXTXN3_115
- MGTXRXN3_115
- MGTXTXP2_115
- MGTXRXP2_115
- MGTXTXN2_115
- MGTXRXN2_115
- MGTREFCLK1N_115
- MGTREFCLK1P_115
- MGTXTXP1_115
- MGTXRXP1_115
- MGTXTXN1_115
- MGTXRXN1_115
- MGTXTXP0_115
- MGTXRXP0_115
- MGTXTXN0_115
- MGTXRXN0_115
- MGTXTXP3_116
- MGTXRXP3_116
- MGTXTXN3_116
- MGTXRXN3_116
- MGTXTXP2_116
- MGTXRXP2_116
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