Xilinx KC705 User Manual page 59

Table 1-28: HPC Connections, J22 to FPGA U1 (Cont'd)
J22 Pin Net Name
J12 FMC_HPC_HA11_P
J13 FMC_HPC_HA11_N
J15 FMC_HPC_HA14_P
J16 FMC_HPC_HA14_N
J18 FMC_HPC_HA18_P
J19 FMC_HPC_HA18_N
J21 FMC_HPC_HA22_P
J22 FMC_HPC_HA22_N
J24 NC
J25 NC
J27 NC
J28 NC
J30 NC
J31 NC
J33 NC
J34 NC
J36 NC
J37 NC
J39 NC
LPC Connector J2
[Figure
The 160-pin LPC connector defined By the FMC specification
provides connectivity for up to:
•
•
•
•
•
The connections between the LPC connector at J2 and FPGA U1
subset of this connectivity:
•
KC705 Evaluation Board
UG810 (v1.3) May 10, 2013
FPGA U1
Pin
B13
A13
J16
H16
K14
J14
L11
K11
1-2, callout 31]
68 single-ended or 34 differential user-defined signals
1 GTX transceiver
1 GTX clock
2 differential clocks
61 ground and 10 power connections
34 differential user defined pairs
• 34 LA pairs (LA00-LA33)
www.xilinx.com
J22 Pin Net Name
K11 FMC_HPC_HA06_N
K13 FMC_HPC_HA10_P
K14 FMC_HPC_HA10_N
K16 FMC_HPC_HA17_CC_P
K17 FMC_HPC_HA17_CC_N
K19 FMC_HPC_HA21_P
K20 FMC_HPC_HA21_N
K22 FMC_HPC_HA23_P
K23 FMC_HPC_HA23_N
K25 NC
K26 NC
K28 NC
K29 NC
K31 NC
K32 NC
K34 NC
K35 NC
K37 NC
K38 NC
K40 NC
Feature Descriptions
FPGA U1
Pin
C14
A11
A12
G13
F13
J11
J12
L12
L13
(Figure B-2, page 74)
(Table 1-29) implement a
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