Xilinx KC705 User Manual page 76

Appendix C: Master UCF Listing
NET FMC_LPC_LA07_P
NET FMC_LPC_LA07_N
NET FMC_LPC_LA02_P
NET FMC_LPC_LA02_N
NET FMC_LPC_LA05_P
NET FMC_LPC_LA05_N
NET FMC_LPC_LA08_P
NET FMC_LPC_LA08_N
NET FMC_LPC_LA03_P
NET FMC_LPC_LA03_N
NET FMC_LPC_LA04_P
NET FMC_LPC_LA04_N
NET FMC_LPC_LA06_P
NET FMC_LPC_LA06_N
NET SI5326_RST_LS
NET ROTARY_INCB
NET ROTARY_INCA
NET ROTARY_PUSH
NET REC_CLOCK_C_P
NET REC_CLOCK_C_N
NET GPIO_DIP_SW3
NET GPIO_DIP_SW2
NET GPIO_DIP_SW1
NET GPIO_DIP_SW0
NET XADC_GPIO_3
NET XADC_GPIO_2
NET XADC_GPIO_1
NET XADC_GPIO_0
NET FMC_LPC_LA33_P
NET FMC_LPC_LA33_N
NET FMC_LPC_LA32_P
NET FMC_LPC_LA32_N
NET FMC_LPC_LA31_P
NET FMC_LPC_LA31_N
NET FMC_LPC_LA30_P
NET FMC_LPC_LA30_N
NET FMC_LPC_LA18_CC_P
NET FMC_LPC_LA18_CC_N
NET FMC_LPC_LA17_CC_P
NET FMC_LPC_LA17_CC_N
NET FMC_LPC_CLK1_M2C_P
NET FMC_LPC_CLK1_M2C_N
NET FMC_LPC_LA29_P
NET FMC_LPC_LA29_N
NET FMC_LPC_LA26_P
NET FMC_LPC_LA26_N
NET FMC_LPC_LA28_P
NET FMC_LPC_LA28_N
NET FMC_LPC_LA27_P
NET FMC_LPC_LA27_N
NET FMC_LPC_LA24_P
NET FMC_LPC_LA24_N
NET FMC_LPC_LA25_P
NET FMC_LPC_LA25_N
NET FMC_LPC_LA22_P
NET FMC_LPC_LA22_N
NET FMC_LPC_LA21_P
NET FMC_LPC_LA21_N
NET FMC_LPC_LA23_P
NET FMC_LPC_LA23_N
NET FMC_LPC_LA20_P
NET FMC_LPC_LA20_N
NET FMC_LPC_LA19_P
NET FMC_LPC_LA19_N
NET GPIO_LED_4_LS
NET PHY_RXD4
NET FLASH_D0
NET FLASH_D1
NET FLASH_D2
NET FLASH_D3
NET PHY_MDC
NET FPGA_EMCCLK
NET FLASH_D4
NET FLASH_D5
NET FLASH_D6
NET FLASH_D7
NET FPGA_FCS
NET FLASH_D8
NET FLASH_D9
NET FLASH_D10
NET FLASH_D11
76
LOC = AG25 | IOSTANDARD=LVCMOS25; # Bank
LOC = AH25 | IOSTANDARD=LVCMOS25; # Bank
LOC = AF20 | IOSTANDARD=LVCMOS25; # Bank
LOC = AF21 | IOSTANDARD=LVCMOS25; # Bank
LOC = AG22 | IOSTANDARD=LVCMOS25; # Bank
LOC = AH22 | IOSTANDARD=LVCMOS25; # Bank
LOC = AJ22 | IOSTANDARD=LVCMOS25; # Bank
LOC = AJ23 | IOSTANDARD=LVCMOS25; # Bank
LOC = AG20 | IOSTANDARD=LVCMOS25; # Bank
LOC = AH20 | IOSTANDARD=LVCMOS25; # Bank
LOC = AH21 | IOSTANDARD=LVCMOS25; # Bank
LOC = AJ21 | IOSTANDARD=LVCMOS25; # Bank
LOC = AK20 | IOSTANDARD=LVCMOS25; # Bank
LOC = AK21 | IOSTANDARD=LVCMOS25; # Bank
LOC = AE20 | IOSTANDARD=LVCMOS25; # Bank
LOC = Y25 | IOSTANDARD=LVCMOS25; # Bank
LOC = Y26 | IOSTANDARD=LVCMOS25; # Bank
LOC = AA26 | IOSTANDARD=LVCMOS25; # Bank
LOC = W27 | IOSTANDARD=LVDS_25; # Bank
LOC = W28 | IOSTANDARD=LVDS_25; # Bank
LOC = Y28 | IOSTANDARD=LVCMOS25; # Bank
LOC = AA28 | IOSTANDARD=LVCMOS25; # Bank
LOC = W29 | IOSTANDARD=LVCMOS25; # Bank
LOC = Y29 | IOSTANDARD=LVCMOS25; # Bank
LOC = AA27 | IOSTANDARD=LVCMOS25; # Bank
LOC = AB28 | IOSTANDARD=LVCMOS25; # Bank
LOC = AA25 | IOSTANDARD=LVCMOS25; # Bank
LOC = AB25 | IOSTANDARD=LVCMOS25; # Bank
LOC = AC29 | IOSTANDARD=LVCMOS25; # Bank
LOC = AC30 | IOSTANDARD=LVCMOS25; # Bank
LOC = Y30 | IOSTANDARD=LVCMOS25; # Bank
LOC = AA30 | IOSTANDARD=LVCMOS25; # Bank
LOC = AD29 | IOSTANDARD=LVCMOS25; # Bank
LOC = AE29 | IOSTANDARD=LVCMOS25; # Bank
LOC = AB29 | IOSTANDARD=LVCMOS25; # Bank
LOC = AB30 | IOSTANDARD=LVCMOS25; # Bank
LOC = AD27 | IOSTANDARD=LVCMOS25; # Bank
LOC = AD28 | IOSTANDARD=LVCMOS25; # Bank
LOC = AB27 | IOSTANDARD=LVCMOS25; # Bank
LOC = AC27 | IOSTANDARD=LVCMOS25; # Bank
LOC = AG29 | IOSTANDARD=LVCMOS25; # Bank
LOC = AH29 | IOSTANDARD=LVCMOS25; # Bank
LOC = AE28 | IOSTANDARD=LVCMOS25; # Bank
LOC = AF28 | IOSTANDARD=LVCMOS25; # Bank
LOC = AK29 | IOSTANDARD=LVCMOS25; # Bank
LOC = AK30 | IOSTANDARD=LVCMOS25; # Bank
LOC = AE30 | IOSTANDARD=LVCMOS25; # Bank
LOC = AF30 | IOSTANDARD=LVCMOS25; # Bank
LOC = AJ28 | IOSTANDARD=LVCMOS25; # Bank
LOC = AJ29 | IOSTANDARD=LVCMOS25; # Bank
LOC = AG30 | IOSTANDARD=LVCMOS25; # Bank
LOC = AH30 | IOSTANDARD=LVCMOS25; # Bank
LOC = AC26 | IOSTANDARD=LVCMOS25; # Bank
LOC = AD26 | IOSTANDARD=LVCMOS25; # Bank
LOC = AJ22 | IOSTANDARD=LVCMOS25; # Bank
LOC = AK28 | IOSTANDARD=LVCMOS25; # Bank
LOC = AG27 | IOSTANDARD=LVCMOS25; # Bank
LOC = AG28 | IOSTANDARD=LVCMOS25; # Bank
LOC = AH26 | IOSTANDARD=LVCMOS25; # Bank
LOC = AH27 | IOSTANDARD=LVCMOS25; # Bank
LOC = AF26 | IOSTANDARD=LVCMOS25; # Bank
LOC = AF27 | IOSTANDARD=LVCMOS25; # Bank
LOC = AJ26 | IOSTANDARD=LVCMOS25; # Bank
LOC = AK26 | IOSTANDARD=LVCMOS25; # Bank
LOC = AE26 | IOSTANDARD=LVCMOS25; # Bank
LOC = R19 | IOSTANDARD=LVCMOS25; # Bank
LOC = P24 | IOSTANDARD=LVCMOS25; # Bank
LOC = R25 | IOSTANDARD=LVCMOS25; # Bank
LOC = R20 | IOSTANDARD=LVCMOS25; # Bank
LOC = R21 | IOSTANDARD=LVCMOS25; # Bank
LOC = R23 | IOSTANDARD=LVCMOS25; # Bank
LOC = R24 | IOSTANDARD=LVCMOS25; # Bank
LOC = T20 | IOSTANDARD=LVCMOS25; # Bank
LOC = T21 | IOSTANDARD=LVCMOS25; # Bank
LOC = T22 | IOSTANDARD=LVCMOS25; # Bank
LOC = T23 | IOSTANDARD=LVCMOS25; # Bank
LOC = U19 | IOSTANDARD=LVCMOS25; # Bank
LOC = U20 | IOSTANDARD=LVCMOS25; # Bank
LOC = P29 | IOSTANDARD=LVCMOS25; # Bank
LOC = R29 | IOSTANDARD=LVCMOS25; # Bank
LOC = P27 | IOSTANDARD=LVCMOS25; # Bank
www.xilinx.com
12 VCCO - VADJ_FPGA - IO_L18P_T2_12
12 VCCO - VADJ_FPGA - IO_L18N_T2_12
12 VCCO - VADJ_FPGA - IO_L19P_T3_12
12 VCCO - VADJ_FPGA - IO_L19N_T3_VREF_12
12 VCCO - VADJ_FPGA - IO_L20P_T3_12
12 VCCO - VADJ_FPGA - IO_L20N_T3_12
12 VCCO - VADJ_FPGA - IO_L21P_T3_DQS_12
12 VCCO - VADJ_FPGA - IO_L21N_T3_DQS_12
12 VCCO - VADJ_FPGA - IO_L22P_T3_12
12 VCCO - VADJ_FPGA - IO_L22N_T3_12
12 VCCO - VADJ_FPGA - IO_L23P_T3_12
12 VCCO - VADJ_FPGA - IO_L23N_T3_12
12 VCCO - VADJ_FPGA - IO_L24P_T3_12
12 VCCO - VADJ_FPGA - IO_L24N_T3_12
12 VCCO - VADJ_FPGA - IO_25_12
13 VCCO - VADJ_FPGA - IO_0_13
13 VCCO - VADJ_FPGA - IO_L1P_T0_13
13 VCCO - VADJ_FPGA - IO_L1N_T0_13
13 VCCO - VADJ_FPGA - IO_L2P_T0_13
13 VCCO - VADJ_FPGA - IO_L2N_T0_13
13 VCCO - VADJ_FPGA - IO_L3P_T0_DQS_13
13 VCCO - VADJ_FPGA - IO_L3N_T0_DQS_13
13 VCCO - VADJ_FPGA - IO_L4P_T0_13
13 VCCO - VADJ_FPGA - IO_L4N_T0_13
13 VCCO - VADJ_FPGA - IO_L5P_T0_13
13 VCCO - VADJ_FPGA - IO_L5N_T0_13
13 VCCO - VADJ_FPGA - IO_L6P_T0_13
13 VCCO - VADJ_FPGA - IO_L6N_T0_VREF_13
13 VCCO - VADJ_FPGA - IO_L7P_T1_13
13 VCCO - VADJ_FPGA - IO_L7N_T1_13
13 VCCO - VADJ_FPGA - IO_L8P_T1_13
13 VCCO - VADJ_FPGA - IO_L8N_T1_13
13 VCCO - VADJ_FPGA - IO_L9P_T1_DQS_13
13 VCCO - VADJ_FPGA - IO_L9N_T1_DQS_13
13 VCCO - VADJ_FPGA - IO_L10P_T1_13
13 VCCO - VADJ_FPGA - IO_L10N_T1_13
13 VCCO - VADJ_FPGA - IO_L11P_T1_SRCC_13
13 VCCO - VADJ_FPGA - IO_L11N_T1_SRCC_13
13 VCCO - VADJ_FPGA - IO_L12P_T1_MRCC_13
13 VCCO - VADJ_FPGA - IO_L12N_T1_MRCC_13
13 VCCO - VADJ_FPGA - IO_L13P_T2_MRCC_13
13 VCCO - VADJ_FPGA - IO_L13N_T2_MRCC_13
13 VCCO - VADJ_FPGA - IO_L14P_T2_SRCC_13
13 VCCO - VADJ_FPGA - IO_L14N_T2_SRCC_13
13 VCCO - VADJ_FPGA - IO_L15P_T2_DQS_13
13 VCCO - VADJ_FPGA - IO_L15N_T2_DQS_13
13 VCCO - VADJ_FPGA - IO_L16P_T2_13
13 VCCO - VADJ_FPGA - IO_L16N_T2_13
13 VCCO - VADJ_FPGA - IO_L17P_T2_13
13 VCCO - VADJ_FPGA - IO_L17N_T2_13
13 VCCO - VADJ_FPGA - IO_L18P_T2_13
13 VCCO - VADJ_FPGA - IO_L18N_T2_13
13 VCCO - VADJ_FPGA - IO_L19P_T3_13
13 VCCO - VADJ_FPGA - IO_L19N_T3_VREF_13
13 VCCO - VADJ_FPGA - IO_L20P_T3_13
13 VCCO - VADJ_FPGA - IO_L20N_T3_13
13 VCCO - VADJ_FPGA - IO_L21P_T3_DQS_13
13 VCCO - VADJ_FPGA - IO_L21N_T3_DQS_13
13 VCCO - VADJ_FPGA - IO_L22P_T3_13
13 VCCO - VADJ_FPGA - IO_L22N_T3_13
13 VCCO - VADJ_FPGA - IO_L23P_T3_13
13 VCCO - VADJ_FPGA - IO_L23N_T3_13
13 VCCO - VADJ_FPGA - IO_L24P_T3_13
13 VCCO - VADJ_FPGA - IO_L24N_T3_13
13 VCCO - VADJ_FPGA - IO_25_13
14 VCCO - VCC2V5_FPGA - IO_0_14
14 VCCO - VCC2V5_FPGA - IO_L1P_T0_D00_MOSI_14
14 VCCO - VCC2V5_FPGA - IO_L1N_T0_D01_DIN_14
14 VCCO - VCC2V5_FPGA - IO_L2P_T0_D02_14
14 VCCO - VCC2V5_FPGA - IO_L2N_T0_D03_14
14 VCCO - VCC2V5_FPGA - IO_L3P_T0_DQS_PUDC_B_14
14 VCCO - VCC2V5_FPGA - IO_L3N_T0_DQS_EMCCLK_14
14 VCCO - VCC2V5_FPGA - IO_L4P_T0_D04_14
14 VCCO - VCC2V5_FPGA - IO_L4N_T0_D05_14
14 VCCO - VCC2V5_FPGA - IO_L5P_T0_D06_14
14 VCCO - VCC2V5_FPGA - IO_L5N_T0_D07_14
14 VCCO - VCC2V5_FPGA - IO_L6P_T0_FCS_B_14
14 VCCO - VCC2V5_FPGA - IO_L6N_T0_D08_VREF_14
14 VCCO - VCC2V5_FPGA - IO_L7P_T1_D09_14
14 VCCO - VCC2V5_FPGA - IO_L7N_T1_D10_14
14 VCCO - VCC2V5_FPGA - IO_L8P_T1_D11_14
KC705 Evaluation Board
UG810 (v1.3) May 10, 2013