Xilinx KC705 User Manual page 44

Chapter 1: KC705 Evaluation Board Features
X-Ref Target - Figure 1-21
VCC1V5_FPGA
C23
0.1μF 25V
X5R
GND
LCD_E_LS
LCD_RW_LS
LCD_DB4_LS
LCD_DB5_LS
LCD_DB6_LS
LCD_DB7_LS
LCD_RS_LS
NC
10
The KC705 board base board uses a male Samtec MTLW-107-07-G-D-265 2x7 header (J31)
with 0.025-inch square posts on 0.100-inch centers for connecting to a Samtec
SLW-107-01-L-D female socket on the LCD display panel assembly. The LCD header
shown in
X-Ref Target - Figure 1-22
Low Profile Socket
Samtec SLW-107-01-L-D
Low Profile Terminal
Samtec MTLW-107-07-G-D-265
44
U10
TXS0108E 8-Bit
Bidirectional
Voltage Level
Translator
2 19
VCCA VCCB
1 20
A1 B1
3 18
A2 B2
4 17
A3 B3
5 16
A4 B4
6 15
A5 B5
7 14
A6 B6
8 13
A7 B7
9 12 NC
A8 B8
11
OE GND
LCD_DB7
LCD_DB5
LCD_E
LCD_RS
GND
Figure 1-21: LCD Interface Circuit
Figure 1-22.
Figure 1-22: LCD Header Details
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VCC5V0
C24
0.1μF 25V
X5R
GND
LCD_E
LCD_RW
LCD_DB4
LCD_DB5
LCD_DB6
LCD_DB7
LCD_RS
GND
VCC5V0
J31
1 2 LCD_DB6
LCD_DB4
3 4
NC 5 6 NC
NC 7 8 NC
LCD_RW
9 10
11 12 LCD_VEE
13 14
LCD Display Assembly
10 mm
KC705 PWA
VCC5V0
R92
6.81kΩ
R133
LCD Contrast
2 kΩ
Potentiometer
GND
UG810_c1_20_121211
UG810_c1_21_060711
KC705 Evaluation Board
UG810 (v1.3) May 10, 2013