Xilinx KC705 User Manual page 56

Chapter 1: KC705 Evaluation Board Features
Table 1-28: HPC Connections, J22 to FPGA U1 (Cont'd)
J22 Pin Net Name
A22 FMC_HPC_DP1_C2M_P
A23 FMC_HPC_DP1_C2M_N
A26 FMC_HPC_DP2_C2M_P
A27 FMC_HPC_DP2_C2M_N
A30 FMC_HPC_DP3_C2M_P
A31 FMC_HPC_DP3_C2M_N
A34 NC
A35 NC
A38 NC
A39 NC
C2 FMC_HPC_DP0_C2M_P
C3 FMC_HPC_DP0_C2M_N
C6 FMC_HPC_DP0_M2C_P
C7 FMC_HPC_DP0_M2C_N
C10 FMC_HPC_LA06_P
C11 FMC_HPC_LA06_N
C14 FMC_HPC_LA10_P
C15 FMC_HPC_LA10_N
C18 FMC_HPC_LA14_P
C19 FMC_HPC_LA14_N
C22 FMC_HPC_LA18_CC_P
C23 FMC_HPC_LA18_CC_N
C26 FMC_HPC_LA27_P
C27 FMC_HPC_LA27_N
C30 FMC_HPC_IIC_SCL
C31 FMC_HPC_IIC_SDA
C34 GND
C35 VCC12_P
C37 VCC12_P
C39 VCC3V3
56
FPGA U1
J22 Pin
Pin
C4 B21 FMC_HPC_GBTCLK1_M2C_N
C3 B24 NC
B2 B25 NC
B1 B28 NC
A4 B29 NC
A3 B32 NC
B33 NC
B36 NC
B37 NC
B40 NC
D2 D1 PWRCTL1_VCC4A_PG
D1 D4 FMC_HPC_GBTCLK0_M2C_P
E4 D5 FMC_HPC_GBTCLK0_M2C_N
E3 D8 FMC_HPC_LA01_CC_P
H30 D9 FMC_HPC_LA01_CC_N
G30 D11 FMC_HPC_LA05_P
D29 D12 FMC_HPC_LA05_N
C30 D14 FMC_HPC_LA09_P
B28 D15 FMC_HPC_LA09_N
A28 D17 FMC_HPC_LA13_P
F21 D18 FMC_HPC_LA13_N
E21 D20 FMC_HPC_LA17_CC_P
C19 D21 FMC_HPC_LA17_CC_N
B19 D23 FMC_HPC_LA23_P
D24 FMC_HPC_LA23_N
D26 FMC_HPC_LA26_P
D27 FMC_HPC_LA26_N
D29 FMC_HPC_TCK_BUF
D30 FMC_TDI_BUF
D31 FMC_HPC_TDO_LPC_TDI
D32 VCC3V3
D33 FMC_TMS_BUF
www.xilinx.com
FPGA U1
Net Name
KC705 Evaluation Board
UG810 (v1.3) May 10, 2013
Pin
E7
C8
C7
D26
C26
G29
F30
B30
A30
A25
A26
F20
E20
B22
A22
B18
A18