Sfp/Sfp+ Connector - Xilinx AC701 User Manual

Chapter 1: AC701 Evaluation Board Features
X-Ref Target - Figure 1-18
PCIe lane width/size is selected via jumper J12
selection is 1-lane (J32 pins 1 and 2 jumpered).
X-Ref Target - Figure 1-19
Table 1-12, page 32
For more information refer to UG476, 7 Series FPGAs GTP Transceivers User Guide and
UG477

SFP/SFP+ Connector

[Figure
The AC701 board contains a small form-factor pluggable (SFP+) connector and cage
assembly that accepts SFP or SFP+ modules.
connector circuitry.
34
P1
PCI Express
Four-Lane
Edge connector
OE
A12
GND
A13
REFCLK+
A14
REFCLK-
A15
GND
Figure 1-18: PCI Express Clock
PCIE_PRSNT_X1
PCIE_PRSNT_X4
Figure 1-19: PCI Express Lane Size Select Jumper J12
lists the PCIe edge connector connections.
7 Series FPGAs Integrated Block for PCI Express User Guide (AXI).
1-2, callout 13]
www.xilinx.com
C188
0.01μF 25V
X7R
PCIE_CLK_Q0_C_P PCIE_CLK_Q0_P
PCIE_CLK_Q0_C_N PCIE_CLK_Q0_N
C189
0.01μF 25V
X7R
GND
(Figure 1-19). The default lane size
J12
PCIE_PRSNT_B
1 2
3 4
UG952_c1_19_100312
Figure 1-20 shows the SFP+ module
UG952 (v1.0) October 23, 2012
UG952_c1_18_100312
AC701 Evaluation Board