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Table 1-24
Table 1-24: GPIO Connections to FPGA U1
AC701 Evaluation Board
UG952 (v1.0) October 23, 2012
lists the GPIO Connections to FPGA U1.
FPGA (U1) Pin
Schematic Net Name
User LEDs (Active High)
M26
T24
T25
R26
Directional Push-Button Switches (Active High)
P6
U5
T5
R5
U6
CPU_RESET Push-Button Switches (Active High)
U4
4-Pole DIP Switch (Active High)
R8
P8
R7
R6
Rotary Encoder Switch (Active High)
P20
N21
N22
User SMA Connectors
T8
USER_SMA_GPIO_P
T7
USER_SMA_GPIO_N
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GPIO_LED_0
GPIO_LED_1
GPIO_LED_2
GPIO_LED_3
GPIO_SW_N
GPIO_SW_E
GPIO_SW_S
GPIO_SW_W
GPIO_SW_C
CPU_RESET
GPIO_DIP_SW0
GPIO_DIP_SW1
GPIO_DIP_SW2
GPIO_DIP_SW3
ROTARY_INCB
ROTARY_PUSH
ROTARY_INCA
Feature Descriptions
GPIO Pin
DS2.2
DS3.2
DS4.2
DS5.2
SW3.3
SW4.3
SW5.3
SW7.3
SW6.3
SW8.3
SW2.1
SW2.2
SW2.3
SW2.4
SW10.6
SW10.5
SW10.1
J33.1
J34.1
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