Eztag With Workstations; Using The Eztag Software; Eztag Files - Xilinx EZTag User Manual

EZTag with Workstations

This chapter gives specific information about using EZTag in a
workstation environment to perform JTAG operations. You can use
EZTag to download, read back, verify design configuration data for
any device, and to probe internal logic states of an EPLD design.
EZTag software supports the XC9500 family of Xilinx EPLD devices,
including:
EZTag software support the following capabilities.

Using the EZTag Software

This section describes the EZTag files and commands.

EZTag Files

You must become familiar with the following files, which are used by
the EZTag software.
EZTag User Guide
XC9536
XC95108
XC95216
EZTag allows you to download a design to the EPLD on the target
system.
EZTag can verify EPLD configuration by comparing it to the
original JEDEC programming file after configuring an EPLD.
You can program multiple EPLDs connected on a boundary-scan
chain.
You can apply test vectors from a JEDEC file through the
boundary-scan TAP to EPLDs using the INTEST instruction.
EZTag with Workstations
Chapter 4
4-1