Xilinx EZTag User Manual page 24

EZTag User Guide
Each pin has a 100-Ω series resistor. You must provide an external
pull-up resistor (approximately 10-50-kΩ) where indicated.
Table 2-2 describes the pin connections to the target circuit board.
Table 2-2 XChecker Cable Connections and Definitions
Name
VCC
GND
RD (TDO)
TDI
TCK
TMS
CLKI
CLKO
CCLK
D/P
DIN
PROG
INIT
2-6
Function
Power – Supplies V
CC
100 mA, typically) to the
cable.
Ground – Supplies ground
reference to the cable.
Read Data – Read back
data from the target sys-
tem is read at this pin.
Test Data In – this signal is
used to transmit serial test
instructions and data.
Test Clock – this clock
drives the test logic for all
devices on boundary-scan
chain.
Test Mode Select – this sig-
nal is decoded by the TAP
controller to control test
operations.
Not used.
Not used.
Not used.
Not used.
Not used.
Not used.
Not used.
Connections
(5 V, To target system V
To target system
ground
Connect to system
TDO pin.
Connect to system TDI
pin.
Connect to system
TCK pin.
Connect to system
TMS pin.
Unconnected.
Unconnected.
Unconnected
Unconnected
Unconnected
Unconnected.
Unconnected.
Xilinx Development System
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