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Introduction
Exit2-DR. This is a temporary state that allows the option of passing
on to the Update-DR state or returning to the Shift-DR state to
continue shifting in data.
Update-DR. This state causes the data contained in the currently
selected data register to be loaded into a latched parallel output (for
registers that have such a latch) on the falling edge of TCK after
entering this state. The parallel latch prevents changes at the parallel
output of these registers from occurring during the shifting process.
Capture-IR. This state allows data to be loaded from parallel inputs
into the instruction register on the rising edge of TCK. The least two
significant bits of the parallel inputs must have the value 01 as
defined by IEEE Std. 1149.1, and the remaining 6 bits are either hard-
coded or used for monitoring of the security and data protect bits.
Shift-IR. This state shifts the values in the instruction register
towards TDO by one stage on each rising edge of TCK after entering
this state.
Exit1-IR. This is a temporary state that allows the option of passing
on to the Pause-IR state or transitioning directly to the Update-IR
state.
Pause-IR. This is a wait state that allows shifting of the instruction to
be temporarily halted.
Exit2-IR. This is a temporary state that allows the option of passing
on to the Update-IR state or returning to the Shift-IR state to continue
shifting in data.
Update-IR. This state causes the values contained in the instruction
register to be loaded into a latched parallel output on the falling edge
of TCK after entering this state. The parallel latch prevents changes at
the parallel output of the instruction register from occurring during
the shifting process.
JTAG Instructions Supported in FastFLASH Parts
Mandatory Boundary Scan Instructions
BYPASS. The BYPASS instruction allows rapid movement of data to
and from other components on a board that are required to perform
test operations.
EZTag User Guide
1-5
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