Jedec 3C Summary - Xilinx EZTag User Manual

Introduction
The system looks for BSDL files along the XACT path and in the
current working directory. The name of the BSDL file is assumed to
be < device name >.bsd.

JEDEC 3C Summary

This is the fuse map and functional verification vector file. This is an
ASCII file containing the configuration information and, optionally,
the vectors that can be used to verify the functional behavior of the
configured part. One JEDEC file is generated for each FastFLASH
device in the system.
The system looks for the JEDEC files along the XACT path and in the
current working directory. The name of the JEDEC file is assumed to
be < design name >.jed, but can be specified exactly by the user.
EZTag User Guide 1-9