Single Pulse Mode - Holtek HT66F20-1 Manual

Single Pulse Mode

To select this mode, bits T1M1 and T1M0 in the TM1C1 register should be set to 10 respectively
and also the T1IO1 and T1IO0 bits should be set to 11 respectively. The Single Pulse Output Mode,
as the name suggests, will generate a single shot pulse on the TM output pin.
The trigger for the pulse output leading edge is a low to high transition of the T1ON bit, which can
be implemented using the application program. However in the Single Pulse Mode, the T1ON bit
can also be made to automatically change from low to high using the external TCK1 pin, which will
in turn initiate the Single Pulse output. When the T1ON bit transitions to a high level, the counter
will start running and the pulse leading edge will be generated. The T1ON bit should remain high
when the pulse is in its active state. The generated pulse trailing edge will be generated when the
T1ON bit is cleared to zero, which can be implemented using the application program or when a
compare match occurs from Comparator A.
However a compare match from Comparator A will also automatically clear the T1ON bit and thus
generate the Single Pulse output trailing edge. In this way the CCRA value can be used to control
the pulse width. A compare match from Comparator A will also generate a TM interrupt. The counter
can only be reset back to zero when the T1ON bit changes from low to high when the counter
restarts. In the Single Pulse Mode CCRP is not used. The T1CCLR and T1nDPX bits are not used in
this Mode.
S / W C o m m a n d
S E T " T n O N "
T C K n P i n T r a n s i t i o n
Rev. 1.40
HT66F20-1/HT66F30-1/HT68F20-1/HT68F30-1
L e a d i n g E d g e
T n O N b i t
o r
0 ® 1
T M n O u t p u t P i n
P u l s e W i d t h = C C R A V a l u e
Single Pulse Generation
104
Flash MCU with EEPROM
T r a i l i n g E d g e
S / W C o m m a n d
C L R " T n O N "
T n O N b i t
o r
1 ® 0
C C R A M a t c h C o m p a r e
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