Fast Wake-Up - Holtek HT66F20-1 Manual

LTO: Low speed system oscillator ready flag
Bit 3
0: Not ready
1: Ready
This is the low speed system oscillator ready flag which indicates when the low speed
system oscillator is stable after power on reset or a wake-up has occurred. The flag
will be low when in the SLEEP0 Mode but after a wake-up has occurred, the flag will
change to a high level after 1024 clock cycles if the LXT oscillator is used and 1~2
clock cycles if the LIRC oscillator is used.
Bit 2 HTO: High speed system oscillator ready flag
0: Not ready
1: Ready
This is the high speed system oscillator ready flag which indicates when the high
speed system oscillator is stable. This flag is cleared to "0" by hardware when these
devices are powered on and then changes to a high level after the high speed system
oscillator is stable. Therefore this flag will always be read as "1" by the application
program after devices power-on. The flag will be low when in the SLEEP or IDLE0
Mode but after a wake-up has occurred, the flag will change to a high level after 1024
clock cycles if the HXT oscillator is used and after 15~16 clock cycles if the ERC or
HIRC oscillator is used.
Bit 1 IDLEN: IDLE Mode control
0: Disable
1: Enable
This is the IDLE Mode Control bit and determines what happens when the HALT
instruction is executed. If this bit is high, when a HALT instruction is executed these
devices will enter the IDLE Mode. In the IDLE1 Mode the CPU will stop running
but the system clock will continue to keep the peripheral functions operational, if
FSYSON bit is high. If FSYSON bit is low, the CPU and the system clock will all
stop in IDLE0 mode. If the bit is low these devices will enter the SLEEP Mode when a
HALT instruction is executed.
HLCLK: System clock selection
Bit 0
0: f
1: f
This bit is used to select if the f
system clock. When the bit is high the f
f /2~f
H
to the f

Fast Wake-up

To minimise power consumption these devices can enter the SLEEP or IDLE0 Mode, where the
system clock source to these devices will be stopped. However when these devices are woken
up again, it can take a considerable time for the original system oscillator to restart, stabilise and
allow normal operation to resume. To ensure the device is up and running as fast as possible a Fast
Wake-up function is provided, which allows f
as a temporary clock to first drive the system until the original system oscillator has stabilised. As
the clock source for the Fast Wake-up function is f
the SLEEP1 and IDLE0 modes. When these devices are woken up from the SLEEP0 mode, the Fast
Wake-up function has no effect because the f
function is controlled using the FSTEN bit in the SMOD register.
If the HXT oscillator is selected as the NORMAL Mode system clock, and if the Fast Wake-up
function is enabled, then it will take one to two t
the system to wake-up. The system will then initially run under the f
HXT clock cycles have elapsed, at which point the HTO flag will switch high and the system will
switch over to operating from the HXT oscillator.
Rev. 1.40
HT66F20-1/HT66F30-1/HT68F20-1/HT68F30-1
/2~f /64 or f
H H L
H
clock or the f
H
/64 or f clock will be selected. When system clock switches from the f
H L
clock and the f clock will be automatically switched off to conserve power.
L H
, namely either the LXT or LIRC oscillator, to act
SUB
clock is stopped. The Fast Wake-up enable/disable
SUB
SUB
5�
Flash MCU with EEPROM
/2~f /64 or f clock is used as the
H H L
clock will be selected and if low the
H
, the Fast Wake-up function is only available in
SUB
clock cycles of the LIRC or LXT oscillator for
clock source until 1024
SUB
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clock
H